fix(cpus): workaround for Cortex-X3 erratum 3213672
Cortex-X3 erratum 3213672 is a Cat B erratum that applies to
r0p0, r1p0, r1p1 and r1p2. It is still open.
This erratum can be worked around by setting CPUACTLR_EL1[36]
before enabling icache.
SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ia1c03217f4e1816b4e8754a090cf5bc17546be40
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index c9213c9..0d6a5dd 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -836,6 +836,10 @@
CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
CPU. It is fixed in r1p2.
+- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3
+ CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
+ of the CPU. It is still open.
+
- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3
CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
of the CPU. It is still open.
diff --git a/lib/cpus/aarch64/cortex_x3.S b/lib/cpus/aarch64/cortex_x3.S
index a166e0f..36bb419 100644
--- a/lib/cpus/aarch64/cortex_x3.S
+++ b/lib/cpus/aarch64/cortex_x3.S
@@ -96,6 +96,12 @@
check_erratum_ls cortex_x3, ERRATUM(2779509), CPU_REV(1, 1)
+workaround_reset_start cortex_x3, ERRATUM(3213672), ERRATA_X3_3213672
+ sysreg_bit_set CORTEX_X3_CPUACTLR_EL1, BIT(36)
+workaround_reset_end cortex_x3, ERRATUM(3213672)
+
+check_erratum_ls cortex_x3, ERRATUM(3213672), CPU_REV(1, 2)
+
workaround_reset_start cortex_x3, ERRATUM(3692984), ERRATA_X3_3692984
sysreg_bit_set CORTEX_X3_CPUACTLR6_EL1, BIT(41)
workaround_reset_end cortex_x3, ERRATUM(3692984)
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 5dbbb9e..4bf76f9 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -846,6 +846,11 @@
# to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
CPU_FLAG_LIST += ERRATA_X3_2779509
+# Flag to apply erratum 3213672 workaround on reset. This erratum applies
+# to revisions r0p0, r1p0, r1p1 and r1p2 of the Cortex-X3 cpu.
+# It is still open.
+CPU_FLAG_LIST += ERRATA_X3_3213672
+
# Flag to apply erratum 3692984 workaround on reset. This erratum applies
# to revisions r0p0, r1p0, r1p1, r1p2 of the Cortex-X3 cpu and is still open.
CPU_FLAG_LIST += ERRATA_X3_3692984