feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM
This should replace the stm32mp157a-avenger96.dts with the new device
tree files split into the STM32MP15 DHCOR SoM definition and the
Avenger96 baseboard like it's done in Linux and U-Boot.
Differences to stm32mp157a-avenger96.dts:
- Enable sdmmc2 for booting from eMMC
- improved clock settings like in U-Boot commit b6055945
"ARM: dts: stm32: Adjust PLL4 settings on AV96 again"
- improved DDR settings for DHSOMs like in U-Boot commit 92ca0f74
"ARM: dts: stm32: Synchronize DDR setttings on DH SoMs"
TF-A with this new dts(i) files on this board was fully tested with
the latest OP-TEE developer setup.
Change-Id: I85ce8eca7747965af3555fc19fd7b192dc3e5740
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi
index 1b5fbc6..7d2be0b 100644
--- a/fdts/stm32mp15-pinctrl.dtsi
+++ b/fdts/stm32mp15-pinctrl.dtsi
@@ -120,6 +120,21 @@
};
};
+ sdmmc1_dir_pins_b: sdmmc1-dir-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
+ <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
+ <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ pins2{
+ pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
+ bias-pull-up;
+ };
+ };
+
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
@@ -182,6 +197,18 @@
};
};
+ sdmmc2_d47_pins_c: sdmmc2-d47-2 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
+ <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
+ <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
+ <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
sdmmc2_d47_pins_d: sdmmc2-d47-3 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */