diff --git a/docs/about/features.rst b/docs/about/features.rst
index f15144a..78f5ff3 100644
--- a/docs/about/features.rst
+++ b/docs/about/features.rst
@@ -128,6 +128,7 @@
 in a platform:
 
 -  RSE comms driver ``drivers/arm/rse``
+-  GICv5 driver ``drivers/arm/gicv5`` via ``USE_GIC_DRIVER=5``
 
 Still to come
 -------------
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index c30caac..e80f3d1 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -481,6 +481,11 @@
    the values 0 to 2, to align  with the ``ENABLE_FEAT`` mechanism.
    Default value is ``0``.
 
+ - ``ENABLE_FEAT_GCIE``: Boolean value to enable support for the GICv5 CPU
+   interface (see ``USE_GIC_DRIVER`` for the IRI). GICv5 and GICv3 are mutually
+   exclusive, so the ``ENABLE_FEAT`` mechanism is currently not supported.
+   Default value is ``0``.
+
 -  ``ENABLE_FEAT_THE``: Numeric value to enable support for FEAT_THE
    (Translation Hardening Extension) at EL2 and below, setting the bit
    SCR_EL3.RCWMASKEn in EL3 to allow access to RCWMASK_EL1 and RCWSMASK_EL1
@@ -1308,6 +1313,7 @@
 
  - ``3``: use the GICv3 driver. See the next section on how to further configure
    it. Use this option for GICv4 implementations.
+ - ``5``: use the EXPERIMENTAL GICv5 driver. Requires ``ENABLE_FEAT_GCIE=1``.
 
  For GIC driver versions other than ``1``, deciding when to save and restore GIC
  context on a power domain state transition, as well as any GIC actions outside