commit a74e3a16b50c70a34936b03876c2018c52ae8311
author Alexei Fedorov <Alexei.Fedorov@arm.com> Fri Oct 25 09:36:59 2019 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Fri Oct 25 09:36:59 2019 +0000
tree d34d7ebe04adc0ba45fd87500d93cbcac83fea8c
parent a04808c16cfc126d9fe572ae7c4b5a3d39de5796
parent b30646a8f7f8c428faa02f26c01ca383b985afed

Merge "plat/arm: use Aff3 bits also to validate mpidr" into integration

plat/arm/common/arm_topology.c

diff --git a/plat/arm/common/arm_topology.c b/plat/arm/common/arm_topology.c
index 37047bc..c9993a7 100644
--- a/plat/arm/common/arm_topology.c
+++ b/plat/arm/common/arm_topology.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -24,7 +24,8 @@
 
 	valid_mask = ~(MPIDR_AFFLVL_MASK |
 			(MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) |
-			(MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT));
+			(MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT) |
+			(MPIDR_AFFLVL_MASK << MPIDR_AFF3_SHIFT));
 	cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
 	cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
 	pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;