diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 643d3a4..8b0ab4b 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -581,6 +581,10 @@
    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
    It has been fixed in r2p0.
 
+-  ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to
+   Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
+   It has been fixed in r2p0.
+
 -  ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to
    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
    r2p0 of the CPU. It is still open.
diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S
index 7370644..728c51f 100644
--- a/lib/cpus/aarch64/cortex_a710.S
+++ b/lib/cpus/aarch64/cortex_a710.S
@@ -43,6 +43,12 @@
 
 check_erratum_ls cortex_a710, ERRATUM(1916945), CPU_REV(1, 0)
 
+workaround_reset_start cortex_a710, ERRATUM(1917258), ERRATA_A710_1917258
+	sysreg_bit_set	CORTEX_A710_CPUACTLR4_EL1, BIT(43)
+workaround_reset_end cortex_a710, ERRATUM(1917258)
+
+check_erratum_ls cortex_a710, ERRATUM(1917258), CPU_REV(1, 0)
+
 workaround_reset_start cortex_a710, ERRATUM(1987031), ERRATA_A710_1987031
 	ldr x0,=0x6
 	msr S3_6_c15_c8_0,x0
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 36050c3..7cf86a2 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -569,6 +569,10 @@
 # to revisions r0p0 and r1p0 of the Cortex-A710 CPU and is fixed in r2p0.
 CPU_FLAG_LIST += ERRATA_A710_1916945
 
+# Flag to apply erratum 1917258 workaround during reset. This erratum applies
+# to revisions r0p0 and r1p0 of the Cortex-A710 CPU and is fixed in r2p0.
+CPU_FLAG_LIST += ERRATA_A710_1917258
+
 # Flag to apply erratum 1987031 workaround during reset. This erratum applies
 # to revisions r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
 CPU_FLAG_LIST += ERRATA_A710_1987031