1. 484bb38 Merge pull request #324 from soby-mathew/sm/sys_suspend by danh-arm · 10 years ago
  2. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 10 years ago
  3. c0aff0e PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · 11 years ago
  4. 9b89613 Fix integer extension in mpidr_set_aff_inst() by Andrew Thoelke · 10 years ago
  5. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 10 years ago
  6. 52010cc Rationalize reset handling code by Sandrine Bailleux · 10 years ago
  7. 42cae5a PSCI: Set ON_PENDING state early during CPU_ON by Soby Mathew · 10 years ago
  8. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  9. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
  10. ba592e2 Fix violations to the coding style by Sandrine Bailleux · 10 years ago
  11. 8c32bc2 Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · 10 years ago
  12. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  13. b234b2c Verify capabilities before handling PSCI calls by Soby Mathew · 11 years ago
  14. 90e8258 Implement PSCI_FEATURES API by Soby Mathew · 11 years ago
  15. 8991eed Rework the PSCI migrate APIs by Soby Mathew · 11 years ago
  16. 22f0897 Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 11 years ago
  17. 539dced Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · 11 years ago
  18. 31244d7 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · 11 years ago
  19. 78879b9 Rework internal API to save non-secure entry point info by Soby Mathew · 11 years ago
  20. 2f5aade PSCI: Check early for invalid CPU state during CPU ON by Soby Mathew · 11 years ago
  21. e146f4c Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · 11 years ago
  22. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 11 years ago
  23. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 11 years ago
  24. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 11 years ago
  25. 264999f Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl() by Soby Mathew · 11 years ago
  26. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 11 years ago
  27. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  28. a4a8eae Miscellaneous PSCI code cleanups by Achin Gupta · 11 years ago
  29. 0a46e2c Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 11 years ago
  30. 84c9f10 Rework state management in the PSCI implementation by Achin Gupta · 11 years ago
  31. 776b68a Add PSCI service specific per-CPU data by Achin Gupta · 11 years ago
  32. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 11 years ago
  33. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 11 years ago
  34. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 11 years ago
  35. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  36. 539a7b3 Remove the concept of coherent stacks by Achin Gupta · 11 years ago
  37. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 11 years ago
  38. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 11 years ago
  39. 56378aa Remove current CPU mpidr from PSCI common code by Andrew Thoelke · 11 years ago
  40. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 11 years ago
  41. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 11 years ago
  42. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 11 years ago
  43. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 11 years ago
  44. 41cf7bd Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · 11 years ago
  45. 47fe640 Merge pull request #144 from athoelke/at/init-context-v2 by danh-arm · 11 years ago
  46. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 11 years ago
  47. 13ac44a Eliminate psci_suspend_context array by Andrew Thoelke · 11 years ago
  48. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 11 years ago
  49. 5219862 Merge pull request #140 from athoelke/at/psci_smc_handler by danh-arm · 11 years ago
  50. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 11 years ago
  51. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 11 years ago
  52. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 11 years ago
  53. 5003eca PSCI SMC handler improvements by Andrew Thoelke · 11 years ago
  54. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 11 years ago for-v0.4-rc0
  55. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 11 years ago
  56. 7a9a5f2 Remove unused data declarations by Dan Handley · 11 years ago
  57. c6bc071 Remove extern keyword from function declarations by Dan Handley · 11 years ago
  58. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 11 years ago
  59. db0de0e Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 11 years ago
  60. 3ea8540 Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 11 years ago
  61. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  62. 23ff9ba Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago
  63. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  64. 317ba09 Fix broken standby state implementation in PSCI by Achin Gupta · 11 years ago
  65. b793e43 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · 11 years ago
  66. 401607c Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 11 years ago
  67. c3260f9 Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  68. 7935d0a Access system registers directly in assembler by Andrew Thoelke · 11 years ago
  69. 8cec598 Correct usage of data and instruction barriers by Andrew Thoelke · 11 years ago
  70. 625de1d Remove variables from .data section by Dan Handley · 11 years ago
  71. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  72. fb037bf Always use named structs in header files by Dan Handley · 11 years ago
  73. c594573 Move PSCI global functions out of private header by Dan Handley · 11 years ago
  74. 5b827a8 Separate BL functions out of arch.h by Dan Handley · 11 years ago
  75. 35e98e5 Make use of user/system includes more consistent by Dan Handley · 11 years ago
  76. 759ec93 Preserve PSCI cpu_suspend 'power_state' parameter. by Vikram Kanigiri · 11 years ago
  77. 0a30cf5 Place assembler functions in separate sections by Andrew Thoelke · 11 years ago
  78. d118f9f Add standby state support in PSCI cpu_suspend api by Vikram Kanigiri · 11 years ago
  79. 6ba0b6d Remove partially qualified asm helper functions by Vikram Kanigiri · 11 years ago
  80. 64f6ea9 Implement ARM Standard Service by Jeenu Viswambharan · 11 years ago