commit 43bb631fac5582c415a6c9a1522c38698be3ad31
author Manish V Badarkhe <Manish.Badarkhe@arm.com> Mon Jan 04 08:55:05 2021 +0000
committer Mark Dykes <mark.dykes@arm.com> Mon May 24 17:52:27 2021 +0200
tree 89bcec7a43b8f07595464ad992a1fadf1cb1ba75
parent e9b7b5a9175a9cd30c551970a7ccba475430438f

Use RevC model for AArch32 GICv2 run configuration

Updated script to use RevC model for running AArch32 GICv2
configuration.

As this RevC model is not available publicly, the Open CI environment
continues to use the RevB model for running AArch32 GICv2
configuration.

Change-Id: I537eca748a1266eb1968dd2b417d8eb16eec2ea4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

model/base-aemv8a.sh

diff --git a/model/base-aemv8a.sh b/model/base-aemv8a.sh
index 51fa911..682ab94 100644
--- a/model/base-aemv8a.sh
+++ b/model/base-aemv8a.sh
@@ -1,6 +1,6 @@
 #!/usr/bin/env bash
 #
-# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+# Copyright (c) 2019-2021, Arm Limited. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -33,3 +33,13 @@
 -C gic_distributor.print-memory-map=1
 EOF
 fi
+
+# GIC and pctl CPU affinity properties for aarch32.gicv2
+if [ "$aarch32" = "1" ] && [ "$gicv3_gicv2_only" = "1" ]; then
+        cat <<EOF >>"$model_param_file"
+-C gic_distributor.CPU-affinities=0.0.0.0,0.0.0.1,0.0.0.2,0.0.0.3,0.0.1.0,0.0.1.1,0.0.1.2,0.0.1.3
+-C pctl.CPU-affinities=0.0.0.0,0.0.0.1,0.0.0.2,0.0.0.3,0.0.1.0,0.0.1.1,0.0.1.2,0.0.1.3
+-C gic_distributor.reg-base-per-redistributor=0.0.0.0=0x2f100000,0.0.0.1=0x2f120000,0.0.0.2=0x2f140000,0.0.0.3=0x2f160000,0.0.1.0=0x2f180000,0.0.1.1=0x2f1a0000,0.0.1.2=0x2f1c0000,0.0.1.3=0x2f1e0000
+-C pctl.Affinity-shifted=0
+EOF
+fi

model/base-aemva-common.sh

diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index d1ac356..01b6b20 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -58,6 +58,13 @@
 # Enable SMMUv3 functionality
 reset_var has_smmuv3_params
 
+# Layout of MPIDR. 0=AFF0 is CPUID, 1=AFF1 is CPUID
+reset_var mpidr_layout
+
+# Sets the MPIDR.MT bit. Setting this to true hints the cluster
+# is multi-threading compatible
+reset_var supports_multi_threading
+
 source "$ci_root/model/fvp_common.sh"
 
 #------------ Common configuration --------------
@@ -137,6 +144,10 @@
 
 ${gicv3_ext_interrupt_range+-C cluster0.gicv3.extended-interrupt-range-support=$gicv3_ext_interrupt_range}
 
+${mpidr_layout+-C cluster0.mpidr_layout=$mpidr_layout}
+
+${supports_multi_threading+-C cluster0.supports_multi_threading=$supports_multi_threading}
+
 EOF
 
 if [ "$has_smmuv3_params" = "1" ]; then
@@ -235,6 +246,10 @@
 ${restriction_on_speculative_execution+-C cluster1.restriction_on_speculative_execution=$restriction_on_speculative_execution}
 
 ${gicv3_ext_interrupt_range+-C cluster1.gicv3.extended-interrupt-range-support=$gicv3_ext_interrupt_range}
+
+${mpidr_layout+-C cluster1.mpidr_layout=$mpidr_layout}
+
+${supports_multi_threading+-C cluster1.supports_multi_threading=$supports_multi_threading}
 EOF
 
 # Parameters to select architecture version