Add Hafnium code coverage configurations
Signed-off-by: Saul Romero <saul.romero@arm.com>
Change-Id: I43d76ce35246e20668f68d955b91c8bf04e6514d
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-48bit-pa:fvp-spm.48bit_pa.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-48bit-pa:fvp-spm.48bit_pa.bmcov-debug
new file mode 100644
index 0000000..8c2d647
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-48bit-pa:fvp-spm.48bit_pa.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-ivy-vhe:fvp-spm.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-ivy-vhe:fvp-spm.bmcov-debug
new file mode 100644
index 0000000..ca6c54c
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm,fvp-ivy-vhe:fvp-spm.bmcov-debug
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+pre_spm_build() {
+ # Hafnium build repo containing Sercure hafnium binary build for vhe
+ out_dir="secure_aem_v8a_fvp_vhe_clang" set_spm_out_dir
+}
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-measured-boot,fvp-default:fvp-spm+romlib.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-measured-boot,fvp-default:fvp-spm+romlib.bmcov-debug
new file mode 100644
index 0000000..c473896
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-measured-boot,fvp-default:fvp-spm+romlib.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-default:fvp-spm.trp.tftf-tftf.rme.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-default:fvp-spm.trp.tftf-tftf.rme.bmcov-debug
new file mode 100644
index 0000000..5515958
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-default:fvp-spm.trp.tftf-tftf.rme.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2023 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-invalid-access:fvp-spm.trp.tftf-tftf.rme.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-invalid-access:fvp-spm.trp.tftf-tftf.rme.bmcov-debug
new file mode 100644
index 0000000..5515958
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-rme,fvp-invalid-access:fvp-spm.trp.tftf-tftf.rme.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2023 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-sve,fvp-default-sve:fvp-spm.sve+amu.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-sve,fvp-default-sve:fvp-spm.sve+amu.bmcov-debug
new file mode 100644
index 0000000..8c2d647
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-sve,fvp-default-sve:fvp-spm.sve+amu.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb,fvp-default:fvp-spm+romlib.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb,fvp-default:fvp-spm+romlib.bmcov-debug
new file mode 100644
index 0000000..8c2d647
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb,fvp-default:fvp-spm+romlib.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb-dualroot,fvp-default:fvp-spm+romlib.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb-dualroot,fvp-default:fvp-spm+romlib.bmcov-debug
new file mode 100644
index 0000000..8c2d647
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-default,fvp-spm-tbb-dualroot,fvp-default:fvp-spm+romlib.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/spm-l2-boot-tests-code-coverage/fvp-disable_assertions,fvp-spm,fvp-default:fvp-spm.bmcov-debug b/group/spm-l2-boot-tests-code-coverage/fvp-disable_assertions,fvp-spm,fvp-default:fvp-spm.bmcov-debug
new file mode 100644
index 0000000..8c2d647
--- /dev/null
+++ b/group/spm-l2-boot-tests-code-coverage/fvp-disable_assertions,fvp-spm,fvp-default:fvp-spm.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#