spm: Build with FP registers save/restore support
Enabling CTX_INCLUDE_FPREGS to test SIMD/SVE vectors save/restore
routine when switching context.
Change-Id: I50cc35ded2ae0a40239be5c53946b4e12c04acc4
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 94120e0..b9901d3 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -116,7 +116,7 @@
# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
# if we have NULL value to it, so passing a dummy string.
clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
- CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
+ CTX_INCLUDE_EL2_REGS=1 CTX_INCLUDE_FPREGS=1 SP_LAYOUT_FILE=dummy
#BL2 at EL3 support
clean_build $fvp_common_flags BL2_AT_EL3=1
diff --git a/tf_config/fvp-spm b/tf_config/fvp-spm
index cf4878d..8c16e50 100644
--- a/tf_config/fvp-spm
+++ b/tf_config/fvp-spm
@@ -3,5 +3,6 @@
SPD=spmd
SPMD_SPM_AT_SEL2=1
CTX_INCLUDE_EL2_REGS=1
+CTX_INCLUDE_FPREGS=1
ARM_ARCH_MINOR=4
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-optee-sp b/tf_config/fvp-spm-optee-sp
index 7533f73..8e02a71 100644
--- a/tf_config/fvp-spm-optee-sp
+++ b/tf_config/fvp-spm-optee-sp
@@ -2,6 +2,7 @@
ARM_SPMC_MANIFEST_DTS=plat/arm/board/fvp/fdts/fvp_spmc_optee_sp_manifest.dts
CROSS_COMPILE=aarch64-none-elf-
CTX_INCLUDE_EL2_REGS=1
+CTX_INCLUDE_FPREGS=1
PLAT=fvp
SPD=spmd
SP_LAYOUT_FILE=${tf_root}/build/fvp/${bin_mode}/optee_sp_layout.json
diff --git a/tf_config/fvp-spm-rst-bl31 b/tf_config/fvp-spm-rst-bl31
index 2b9c828..4491e51 100644
--- a/tf_config/fvp-spm-rst-bl31
+++ b/tf_config/fvp-spm-rst-bl31
@@ -4,5 +4,6 @@
SPD=spmd
SPMD_SPM_AT_SEL2=1
CTX_INCLUDE_EL2_REGS=1
+CTX_INCLUDE_FPREGS=1
ARM_ARCH_MINOR=4
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-tbb b/tf_config/fvp-spm-tbb
index b350626..3e8fb3c 100644
--- a/tf_config/fvp-spm-tbb
+++ b/tf_config/fvp-spm-tbb
@@ -3,6 +3,7 @@
SPD=spmd
SPMD_SPM_AT_SEL2=1
CTX_INCLUDE_EL2_REGS=1
+CTX_INCLUDE_FPREGS=1
ARM_ARCH_MINOR=4
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-spm-tbb-dualroot b/tf_config/fvp-spm-tbb-dualroot
index 716e66b..49adaf2 100644
--- a/tf_config/fvp-spm-tbb-dualroot
+++ b/tf_config/fvp-spm-tbb-dualroot
@@ -3,6 +3,7 @@
SPD=spmd
SPMD_SPM_AT_SEL2=1
CTX_INCLUDE_EL2_REGS=1
+CTX_INCLUDE_FPREGS=1
ARM_ARCH_MINOR=4
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa