commit a69cf79e747bd1b7ff5fcc86efc627a9909b814f
author Yann Gautier <yann.gautier@foss.st.com> Wed Sep 01 11:19:01 2021 +0200
committer Madhukar Pappireddy <madhukar.pappireddy@arm.com> Wed Oct 06 17:14:59 2021 +0200
tree 95c01cf6b339c3d3fb23b89cc1054d3f6eb79a30
parent d57f3d93682696cafcf24caba9d2f6801e9e1431

feat(tf-coverity): update STM32MP1 configs

Split compilations for each possible boot device.
Add a configuration for stm32image boot (non-FIP).
Remove bl1 compilation that is not used on STM32MP1.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I44bef476bfb1f3a5513af712948ff700faab442f

script/tf-coverity/tf-cov-make

diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 2233aac..f402ee4 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -477,10 +477,42 @@
     RCAR_DRAM_SPLIT=2 RCAR_LOSSY_ENABLE=1 SPD=none
 
 # Platforms from ST
+# STM32MP1 SDMMC boot
+make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
+    $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_SDMMC=1 \
+    BUILD_PLAT=build/stm32mp1-sdmmc/debug \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
+
+# STM32MP1 eMMC boot
 make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
     $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
-    STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
-    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
+    BUILD_PLAT=build/stm32mp1-emmc/debug \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
+
+# STM32MP1 Raw NAND boot
+make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
+    $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_RAW_NAND=1 \
+    BUILD_PLAT=build/stm32mp1-nand/debug \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
+
+# STM32MP1 SPI NAND boot
+make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
+    $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_SPI_NAND=1 \
+    BUILD_PLAT=build/stm32mp1-snand/debug \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
+
+# STM32MP1 SPI NOR boot
+make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
+    $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_SPI_NOR=1 \
+    BUILD_PLAT=build/stm32mp1-snor/debug \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
+
+# STM32MP1 SDMMC boot without FIP
+make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
+    $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_SDMMC=1 \
+    BUILD_PLAT=build/stm32mp1-sdmmc-stm32image/debug \
+    STM32MP_USE_STM32IMAGE=1 \
+    ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl2 bl32
 
 # Platforms from TI
 make PLAT=k3 $(common_flags) all