feat(mte): add mte2 to build
Currently mte2 is all wrapped with FEAT_MTE but in below change
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26171
we are adding seperation for FEAT_MTE2.
Add FEAT_MTE2 to all SPM builds.
Change-Id: I573ff10ba0dfb224b53f273a82bbecea8b1cd832
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
diff --git a/tf_config/fvp-ras-ffh-spmd-lsp b/tf_config/fvp-ras-ffh-spmd-lsp
index fed64c1..caab81c 100644
--- a/tf_config/fvp-ras-ffh-spmd-lsp
+++ b/tf_config/fvp-ras-ffh-spmd-lsp
@@ -5,6 +5,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm b/tf_config/fvp-spm
index 6e6dfb8..e240d99 100644
--- a/tf_config/fvp-spm
+++ b/tf_config/fvp-spm
@@ -6,6 +6,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-hyp b/tf_config/fvp-spm-hyp
index 41fc2d9..81110ba 100644
--- a/tf_config/fvp-spm-hyp
+++ b/tf_config/fvp-spm-hyp
@@ -8,6 +8,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-measured-boot b/tf_config/fvp-spm-measured-boot
index 6f4516e..2887cdb 100644
--- a/tf_config/fvp-spm-measured-boot
+++ b/tf_config/fvp-spm-measured-boot
@@ -6,6 +6,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
MEASURED_BOOT=1
diff --git a/tf_config/fvp-spm-optee-sp b/tf_config/fvp-spm-optee-sp
index 9d4833f..8ca9a49 100644
--- a/tf_config/fvp-spm-optee-sp
+++ b/tf_config/fvp-spm-optee-sp
@@ -1,6 +1,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
ARM_SPMC_MANIFEST_DTS=plat/arm/board/fvp/fdts/fvp_spmc_optee_sp_manifest.dts
CROSS_COMPILE=aarch64-none-elf-
diff --git a/tf_config/fvp-spm-report-ctx-mem-use b/tf_config/fvp-spm-report-ctx-mem-use
index 6ed9ea3..ca6e472 100644
--- a/tf_config/fvp-spm-report-ctx-mem-use
+++ b/tf_config/fvp-spm-report-ctx-mem-use
@@ -6,6 +6,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
PLATFORM_REPORT_CTX_MEM_USE=1
diff --git a/tf_config/fvp-spm-rme b/tf_config/fvp-spm-rme
index 4661018..ab7c1b6 100644
--- a/tf_config/fvp-spm-rme
+++ b/tf_config/fvp-spm-rme
@@ -7,6 +7,7 @@
BRANCH_PROTECTION=1
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
PLAT_TEST_SPM=1
diff --git a/tf_config/fvp-spm-rst-bl31 b/tf_config/fvp-spm-rst-bl31
index 7c79386..cf7723d 100644
--- a/tf_config/fvp-spm-rst-bl31
+++ b/tf_config/fvp-spm-rst-bl31
@@ -10,6 +10,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-spmd-lsp b/tf_config/fvp-spm-spmd-lsp
index 18b71f2..83c1c66 100644
--- a/tf_config/fvp-spm-spmd-lsp
+++ b/tf_config/fvp-spm-spmd-lsp
@@ -5,6 +5,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-sve b/tf_config/fvp-spm-sve
index a7bb493..1ff1655 100644
--- a/tf_config/fvp-spm-sve
+++ b/tf_config/fvp-spm-sve
@@ -5,6 +5,7 @@
CTX_INCLUDE_EL2_REGS=1
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
ENABLE_SVE_FOR_NS=1
ENABLE_SVE_FOR_SWD=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-tbb b/tf_config/fvp-spm-tbb
index fd42fb9..f60d616 100644
--- a/tf_config/fvp-spm-tbb
+++ b/tf_config/fvp-spm-tbb
@@ -6,6 +6,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-spm-tbb-dualroot b/tf_config/fvp-spm-tbb-dualroot
index 9970675..b601ab1 100644
--- a/tf_config/fvp-spm-tbb-dualroot
+++ b/tf_config/fvp-spm-tbb-dualroot
@@ -6,6 +6,7 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-tbb-mbedtls-mb-spm-rme b/tf_config/fvp-tbb-mbedtls-mb-spm-rme
index 278edb2..5294293 100644
--- a/tf_config/fvp-tbb-mbedtls-mb-spm-rme
+++ b/tf_config/fvp-tbb-mbedtls-mb-spm-rme
@@ -2,6 +2,7 @@
BRANCH_PROTECTION=1
CROSS_COMPILE=aarch64-none-elf-
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_RME=1
FVP_TRUSTED_SRAM_SIZE=384
diff --git a/tf_config/fvp-tc2-spm b/tf_config/fvp-tc2-spm
index 555ed3d..476875f 100644
--- a/tf_config/fvp-tc2-spm
+++ b/tf_config/fvp-tc2-spm
@@ -4,6 +4,7 @@
CTX_INCLUDE_EL2_REGS=1
CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE=1
+ENABLE_FEAT_MTE2=1
ENABLE_SVE_FOR_SWD=1
PLAT=tc
SCP_BL2=/dev/null