commit d098978cc2cbbadae1f15c8d542863ea8c8b562d
author Akshay Belsare <akshay.belsare@amd.com> Fri Jul 14 14:24:56 2023 +0530
committer Manish V Badarkhe <manish.badarkhe@arm.com> Thu Jul 20 10:13:41 2023 +0200
tree 61c1eac51c6b2b0693175a921f1d358e4f84bc3a
parent 041e48a9200e1578ecb3d47da642120455296036

build(versal-net): add build config for ddr

Add build config for Versal NET platform.
The TF-A is placed and executed from DDR in this scenario.

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Change-Id: I44df99a9cdd0cdab53bf9005bf5b52da170f8680

group/tf-l1-build-plat/versal_net-ddr:nil

diff --git a/group/tf-l1-build-plat/versal_net-ddr:nil b/group/tf-l1-build-plat/versal_net-ddr:nil
new file mode 100644
index 0000000..53e6143
--- /dev/null
+++ b/group/tf-l1-build-plat/versal_net-ddr:nil
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+

tf_config/versal_net-ddr

diff --git a/tf_config/versal_net-ddr b/tf_config/versal_net-ddr
new file mode 100644
index 0000000..48c64df
--- /dev/null
+++ b/tf_config/versal_net-ddr
@@ -0,0 +1,6 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=versal_net
+RESET_TO_BL31=1
+VERSAL_ATF_MEM_BASE=0x70000000
+VERSAL_ATF_MEM_SIZE=0x80000
+XILINX_OF_BOARD_DTB_ADDR=0x1000