ci(cm): add test_config to validate EL1 ctx with TSP
* This patch adds tfa and tftf build configs and the appropriate
run_config fragments required to enable the features, which
are covered until v8.9.
* TSP is the secure world software component and TFTF is the Normal
world component, which exercises EL1 context registers in this test.
* Build configs ensures most of the EL1 context registers are getting
involved in the test environment.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I96e52af3eb6a4d06937ece2e7ca32a9828647880
diff --git a/group/tftf-l2-fvp/fvp-tspd-aarch64-only,fvp-context-mgmt:fvp-tftf-fip.tftf-aemv8a.ctx-tspd b/group/tftf-l2-fvp/fvp-tspd-aarch64-only,fvp-context-mgmt:fvp-tftf-fip.tftf-aemv8a.ctx-tspd
new file mode 100644
index 0000000..19363ec
--- /dev/null
+++ b/group/tftf-l2-fvp/fvp-tspd-aarch64-only,fvp-context-mgmt:fvp-tftf-fip.tftf-aemv8a.ctx-tspd
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2024 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index 8192234..00f1bf5 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -85,6 +85,27 @@
# Enable FEAT_ECV
reset_var has_ecv
+# Enable FEAT_S1PIE
+reset_var has_s1pie
+
+# Enable FEAT_S2PIE
+reset_var has_s2pie
+
+# Enable FEAT_S1POE
+reset_var has_s1poe
+
+# Enable FEAT_S2POE
+reset_var has_s2poe
+
+# Enable FEAT_TCR2
+reset_var has_tcr2
+
+# Enable FEAT_CSV2_2
+reset_var has_csv2_2
+
+# Enable FEAT_GCS
+reset_var has_gcs
+
# Layout of MPIDR. 0=AFF0 is CPUID, 1=AFF1 is CPUID
reset_var mpidr_layout
@@ -441,6 +462,55 @@
EOF
fi
+if [ "$has_s1pie" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_permission_indirection_s1=2
+-C cluster1.has_permission_indirection_s1=2
+EOF
+fi
+
+if [ "$has_s2pie" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_permission_indirection_s2=2
+-C cluster1.has_permission_indirection_s2=2
+EOF
+fi
+
+if [ "$has_s1poe" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_permission_overlay_s1=2
+-C cluster1.has_permission_overlay_s1=2
+EOF
+fi
+
+if [ "$has_s2poe" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_permission_overlay_s2=2
+-C cluster1.has_permission_overlay_s2=2
+EOF
+fi
+
+if [ "$has_tcr2" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_tcr2=2
+-C cluster1.has_tcr2=2
+EOF
+fi
+
+if [ "$has_csv2_2" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.restriction_on_speculative_execution=2
+-C cluster1.restriction_on_speculative_execution=2
+EOF
+fi
+
+if [ "$has_gcs" = "1" ]; then
+ cat <<EOF >>"$model_param_file"
+-C cluster0.has_gcs=2
+-C cluster1.has_gcs=2
+EOF
+fi
+
# Accelerator support level enabled
if [ "$accelerator_support_level" != "0" ]; then
cat <<EOF >>"$model_param_file"
diff --git a/run_config/fvp-aemv8a.ctx b/run_config/fvp-aemv8a.ctx
new file mode 100644
index 0000000..2eccefa
--- /dev/null
+++ b/run_config/fvp-aemv8a.ctx
@@ -0,0 +1,35 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+generate_lava_job() {
+ local model="base-aemv8a"
+
+ uart="0" file="tftf.exp" track_expect
+ uart="1" file="hold_uart.exp" track_expect
+
+ model="$model" \
+ arch_version="8.9" \
+ accelerator_support_level="1" \
+ ete_plugin="1" \
+ etm_plugin="1" \
+ etm_present="1" \
+ has_csv2_2="1" \
+ has_sve="1" \
+ has_s1pie="1" \
+ has_s1poe="1" \
+ has_s2poe="1" \
+ has_tcr2="1" \
+ has_gcs="1" \
+ has_v8_9_debug_extension="1" \
+ memory_tagging_support_level="3" \
+ supports_trace_buffer_control_regs="1" \
+ supports_trace_filter_regs="2" \
+ supports_system_trace_filter_regs="1" \
+ gen_model_params
+
+ model="$model" gen_fvp_yaml
+}
diff --git a/tftf_config/fvp-context-mgmt b/tftf_config/fvp-context-mgmt
new file mode 100644
index 0000000..1fe4f45
--- /dev/null
+++ b/tftf_config/fvp-context-mgmt
@@ -0,0 +1,3 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+TESTS=cpu-context-mgmt