Add test configs with GIC600AE model
Added test configurations with GIC600AE model.
Currently, this model supports only single CPU cluster.
Change-Id: If4ca78e5d7fc47ae289e4b8b21e43c5d848f243e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
diff --git a/fvp_utils.sh b/fvp_utils.sh
index 318a1e0..d11a03d 100644
--- a/fvp_utils.sh
+++ b/fvp_utils.sh
@@ -54,6 +54,7 @@
[base-aemv8a-revb]=";;;"
[base-aemv8a-latest-revb]=";;;"
[base-aemva]=";;;"
+[base-aemv8a-gic600ae]=";;;"
[foundationv8]="${foundation_platform};Foundation_Platform"
[base-aemv8a]="${fvp_base_revc_2xaemv8a};FVP_Base_RevC-2xAEMv8A"
[cortex-a32x4]="${fvp_arm_std_library};FVP_Base_Cortex-A32x4"
diff --git a/group/tf-l2-boot-tests-misc/fvp-aarch32-default,fvp-aarch32-default:fvp-tftf.aarch32-fip.tftf-aemv8a_gic600ae.aarch32-debug b/group/tf-l2-boot-tests-misc/fvp-aarch32-default,fvp-aarch32-default:fvp-tftf.aarch32-fip.tftf-aemv8a_gic600ae.aarch32-debug
new file mode 100644
index 0000000..1bbc737
--- /dev/null
+++ b/group/tf-l2-boot-tests-misc/fvp-aarch32-default,fvp-aarch32-default:fvp-tftf.aarch32-fip.tftf-aemv8a_gic600ae.aarch32-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/tf-l2-boot-tests-misc/fvp-default,fvp-default:fvp-tftf-fip.tftf-aemv8a_gic600ae-debug b/group/tf-l2-boot-tests-misc/fvp-default,fvp-default:fvp-tftf-fip.tftf-aemv8a_gic600ae-debug
new file mode 100644
index 0000000..1bbc737
--- /dev/null
+++ b/group/tf-l2-boot-tests-misc/fvp-default,fvp-default:fvp-tftf-fip.tftf-aemv8a_gic600ae-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/base-aemv8a-gic600ae.sh b/model/base-aemv8a-gic600ae.sh
new file mode 100644
index 0000000..3bdd355
--- /dev/null
+++ b/model/base-aemv8a-gic600ae.sh
@@ -0,0 +1,16 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+set_model_path "$warehouse/SysGen/Models/0.0/6415/external/models/$model_flavour/FVP_Base_AEMv8A-GIC600AE"
+
+default_var sve_plugin_path "$warehouse/SysGen/PVModelLib/0.0/6415/external/plugins/$model_flavour/sve2-HEAD/ScalableVectorExtension.so"
+
+source "$ci_root/model/base-aemva-common.sh"
+
+cat <<EOF >>"$model_param_file"
+-C gic_iri.reg-base-per-redistributor=0.0.0.0=0x2f100000,0.0.0.1=0x2f120000,0.0.0.2=0x2f140000,0.0.0.3=0x2f160000,0.0.1.0=0x2f180000,0.0.1.1=0x2f1a0000,0.0.1.2=0x2f1c0000,0.0.1.3=0x2f1e0000
+EOF
diff --git a/run_config/fvp-aemv8a_gic600ae b/run_config/fvp-aemv8a_gic600ae
new file mode 100644
index 0000000..2892271
--- /dev/null
+++ b/run_config/fvp-aemv8a_gic600ae
@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+post_fetch_tf_resource() {
+ local model="base-aemv8a-gic600ae"
+ model="$model" gen_model_params
+
+ model="$model" gen_fvp_yaml
+}
diff --git a/run_config/fvp-aemv8a_gic600ae.aarch32 b/run_config/fvp-aemv8a_gic600ae.aarch32
new file mode 100644
index 0000000..d3dad22
--- /dev/null
+++ b/run_config/fvp-aemv8a_gic600ae.aarch32
@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+post_fetch_tf_resource() {
+ local model="base-aemv8a-gic600ae"
+ aarch32="1" model="$model" gen_model_params
+
+ model="$model" gen_fvp_yaml
+}