blob: 97e62afefed13206f1d34946b25e24c150b53275 [file] [log] [blame]
Manish Pandeyfb4b2ff2023-06-16 16:56:46 +01001diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
Jayanth Dodderi Chidanand496a4052024-09-10 14:30:14 +01002index 742380568..5ff6d3dd8 100644
Manish Pandeyfb4b2ff2023-06-16 16:56:46 +01003--- a/bl31/aarch64/runtime_exceptions.S
4+++ b/bl31/aarch64/runtime_exceptions.S
5@@ -228,6 +228,9 @@ vector_entry sync_exception_aarch64
6 */
7 save_x30
8 apply_at_speculative_wa
9+ mrs x30, scr_el3
10+ orr x30, x30, SCR_EA_BIT
11+ msr scr_el3, x30
12 sync_and_handle_pending_serror
Manish Pandeyfb4b2ff2023-06-16 16:56:46 +010013 handle_sync_exception
Jayanth Dodderi Chidanand496a4052024-09-10 14:30:14 +010014 end_vector_entry sync_exception_aarch64
Manish Pandeyfb4b2ff2023-06-16 16:56:46 +010015diff --git a/services/arm_arch_svc/arm_arch_svc_setup.c b/services/arm_arch_svc/arm_arch_svc_setup.c
Jayanth Dodderi Chidanand496a4052024-09-10 14:30:14 +010016index 545616469..6fb9b942c 100644
Manish Pandeyfb4b2ff2023-06-16 16:56:46 +010017--- a/services/arm_arch_svc/arm_arch_svc_setup.c
18+++ b/services/arm_arch_svc/arm_arch_svc_setup.c
19@@ -14,9 +14,37 @@
20 #include <services/arm_arch_svc.h>
21 #include <smccc_helpers.h>
22 #include <plat/common/platform.h>
23+#include <context.h>
24+#include <lib/el3_runtime/context_mgmt.h>
25+
26+static void target_ea_to_lower_el(void)
27+{
28+ u_register_t scr_el3;
29+ cpu_context_t *ctx = cm_get_context(NON_SECURE);
30+ el3_state_t *el3_ctx = get_el3state_ctx(ctx);
31+ scr_el3 = read_ctx_reg(el3_ctx, CTX_SCR_EL3);
32+ scr_el3 &= ~SCR_EA_BIT;
33+ write_ctx_reg(el3_ctx, CTX_SCR_EL3, scr_el3);
34+}
35
36 static int32_t smccc_version(void)
37 {
38+ /*
39+ * This patch is used in RAS FFH case.
40+ * In RAS FFH case lower EL EAs are routed to EL3 but to do reflection
41+ * of SError tests we need SError to be pended in tftf when SMC call is
42+ * made. Taking an SError depends on PSTATE.A bit of EL but if SCR_EL3.EA
43+ * is set, the SError is immediately taken. So to allow SError to be
44+ * pended in tftf we need to clear SCR_EL3.EA along with PSTATE.A masked
45+ * (which is done in tftf as part of test).
46+ * Since tftf cannot modify SCR_EL3 register, this hack is used in
47+ * SMCCC_VERSION path which tftf calls before running actual test.
48+ *
49+ * We can't directly modify SCR_EL3 and preserve it in context switch that
50+ * is why the context value is modified. The value of SCR_EL3 is modified
51+ * again while exiting EL3 in reflection path.
52+ */
53+ target_ea_to_lower_el();
54 return MAKE_SMCCC_VERSION(SMCCC_MAJOR_VERSION, SMCCC_MINOR_VERSION);
55 }
56