blob: 1e513d8f4941f6ee83bd7a4308da84b6c2611c23 [file] [log] [blame]
Zelalem799ffdc2020-07-10 16:20:35 -05001#
2# Copyright (c) 2020, Arm Limited. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Cache state modelling is disabled for this test as this particular TBBR config
8# thrashes the I-cache hard, leading to ~60% of CPU time spent in the host kernel
9# switching the pages responsible for the I-cache from writable to executable and
10# back again.