Eliminate the use of addr_of and addr_of_mut
addr_of and addr_of_mut is now soft-deprecated, changing to use raw
pointers which was introduced in Rust 1.82. Also fixing clippy warnings.
Signed-off-by: Imre Kis <imre.kis@arm.com>
Change-Id: I96465097ba35a20286ea4036f71f9a215770596c
diff --git a/Cargo.toml b/Cargo.toml
index db5bdf0..af86174 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -13,6 +13,7 @@
license = "MIT OR Apache-2.0"
repository = "https://git.trustedfirmware.org/rust-spmc/rust-spmc.git"
keywords = ["arm", "gic", "interrupt", "driver"]
+rust-version = "1.82"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
diff --git a/src/lib.rs b/src/lib.rs
index 4f7660f..cb0610b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
+// SPDX-FileCopyrightText: Copyright 2023-2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
// SPDX-License-Identifier: MIT OR Apache-2.0
//! # Arm Generic Interrupt Controller driver
@@ -9,10 +9,7 @@
#![no_std]
use bitflags::bitflags;
-use core::{
- ops::{DerefMut, Range},
- ptr::{addr_of, addr_of_mut},
-};
+use core::ops::{DerefMut, Range};
bitflags! {
// Distributor Control Register
@@ -134,9 +131,9 @@
// SAFETY: gicd can be dereferenced as a valid GIC Distributor register block
unsafe {
for n in 0..Self::MAX_IT {
- addr_of_mut!(gicd.icenabler[n]).write_volatile(0xffffffff);
- addr_of_mut!(gicd.icpendr[n]).write_volatile(0xffffffff);
- addr_of_mut!(gicd.igroupr[n]).write_volatile(0xffffffff);
+ (&raw mut gicd.icenabler[n]).write_volatile(0xffffffff);
+ (&raw mut gicd.icpendr[n]).write_volatile(0xffffffff);
+ (&raw mut gicd.igroupr[n]).write_volatile(0xffffffff);
}
}
@@ -147,8 +144,8 @@
pub fn enable_group0(&mut self) {
// SAFETY: self.gicd can be dereferenced as a valid GIC Distributor register block
unsafe {
- let value = addr_of!(self.gicd.ctlr).read_volatile();
- addr_of_mut!(self.gicd.ctlr)
+ let value = (&raw const self.gicd.ctlr).read_volatile();
+ (&raw mut self.gicd.ctlr)
.write_volatile(value | DistributorControlRegister::EnableGrp0.bits());
}
}
@@ -157,8 +154,8 @@
pub fn enable_secure_group1(&mut self) {
// SAFETY: self.gicd can be dereferenced as a valid GIC Distributor register block
unsafe {
- let value = addr_of!(self.gicd.ctlr).read_volatile();
- addr_of_mut!(self.gicd.ctlr)
+ let value = (&raw const self.gicd.ctlr).read_volatile();
+ (&raw mut self.gicd.ctlr)
.write_volatile(value | DistributorControlRegister::EnableGrp1S.bits());
}
}
@@ -167,8 +164,8 @@
pub fn enable_non_secure_group1(&mut self) {
// SAFETY: self.gicd can be dereferenced as a valid GIC Distributor register block
unsafe {
- let value = addr_of!(self.gicd.ctlr).read_volatile();
- addr_of_mut!(self.gicd.ctlr)
+ let value = (&raw const self.gicd.ctlr).read_volatile();
+ (&raw mut self.gicd.ctlr)
.write_volatile(value | DistributorControlRegister::EnableGrp1NS.bits());
}
}
@@ -202,7 +199,7 @@
// SAFETY: self.gicd can be dereferenced as a valid GIC Distributor register block
let mut modify_igroupr = |index, mask| unsafe {
- let ptr: *mut u32 = addr_of_mut!(self.gicd.igroupr[index]);
+ let ptr: *mut u32 = (&raw mut self.gicd.igroupr[index]);
ptr.write_volatile(f(ptr.read_volatile(), mask));
};
@@ -318,14 +315,14 @@
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(8..16).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let mut expected = [0xffff_ffffu32; 32];
expected[0] = 0xffff_00ff;
assert_eq!(result.as_slice(), &expected);
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(8..40).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let mut expected = [0xffff_ffffu32; 32];
expected[0] = 0x0000_00ff;
expected[1] = 0xffff_ff00;
@@ -333,7 +330,7 @@
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(8..72).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let mut expected = [0xffff_ffffu32; 32];
expected[0] = 0x0000_00ff;
expected[1] = 0x0000_0000;
@@ -342,7 +339,7 @@
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(8..64).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let mut expected = [0xffff_ffffu32; 32];
expected[0] = 0x0000_00ff;
expected[1] = 0x0000_0000;
@@ -350,7 +347,7 @@
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(1..1023).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let mut expected = [0x0000_0000u32; 32];
expected[0] = 0x0000_0001;
expected[31] = 0x8000_0000;
@@ -358,13 +355,13 @@
let mut gic_distributor = GicDistributor::new(&mut registers);
gic_distributor.select_group0_range(0..1024).unwrap();
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let expected = [0x0000_0000u32; 32];
assert_eq!(result.as_slice(), &expected);
let mut gic_distributor = GicDistributor::new(&mut registers);
assert!(gic_distributor.select_group0_range(0..2048).is_err());
- let result: Vec<u32> = registers.igroupr.iter().map(|r| *r).collect();
+ let result: Vec<u32> = registers.igroupr.to_vec();
let expected = [0xffff_ffffu32; 32];
assert_eq!(result.as_slice(), &expected);
}