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commit3c999b422e35609a108f51e77f6a3ea9b548c1b4[log] [tgz]
authorSandrine Afsa <sandrine.afsa@arm.com>Wed Jul 09 14:14:13 2025 +0200
committerSandrine Afsa <sandrine.afsa@arm.com>Wed Jul 09 14:30:07 2025 +0200
tree332175512777eb2bd203dfee9cc09356ba5c5bb2
parenta3d116b4cfc4b8f5c2688b4398182a3e37fd6f0d [diff]
Adopt Linux Foundation's guidance on copyrights

Adopt the Linux Foundation guidance [1] on copyright notice formats to
avoid meaningless and frequent updates to source files. It omits the
year range and gathers all contributors under a generic "The
[project-name] Contributors" term, which avoids the need for each
company to add their own copyright notice.

[1] https://www.linuxfoundation.org/blog/blog/copyright-notices-in-open-source-software-projects

Change-Id: I85e51324693e0914ff592f5ab3ac373089534f80
Signed-off-by: Sandrine Afsa <sandrine.afsa@arm.com>
5 files changed
tree: 332175512777eb2bd203dfee9cc09356ba5c5bb2
  1. src/
  2. .gitignore
  3. Cargo.lock
  4. Cargo.toml
  5. CHANGELOG.md
  6. dco.txt
  7. LICENSE-Apache-2.0
  8. LICENSE-MIT
  9. README.md
README.md

Arm PrimeCell UART (PL011) driver

Driver implementation for the PL011 UART peripheral.

The driver is designed to function regardless of whether a Memory Management Unit (MMU) is present. The primary role of the OwnedMmioPointer is to manage the lifetime of the peripheral, ensuring proper resource handling. In a system that includes an MMU, the peripheral's lifetime is dynamic because it is mapped into memory rather than having a fixed address. In a system without an MMU, the OwnedMmioPointer can be instantiated directly from the physical address of the register block, providing access to the peripheral without requiring memory mapping.

Implemented features

  • Enabling/disabling UART peripheral which includes configuring the data bit number, parity settings, stop bit count and baudrate
  • Checking various status flags
  • Non-blocking read/write functions
  • Handling UART errors
  • Reading UART identification structure
  • 98% unit test coverage
  • Setting FIFO level of RX/TX interrupts
  • Reading, masking and clearing interrupts
  • Implementing various traits
    • embedded_hal_nb::serial::{Write, Read} (optional, behind the embedded-hal-nb feature flag)
    • embedded_io::{Write, Read} (optional, behind the embedded-io feature flag)
    • core::fmt::Write

Feature flags

  • embedded-hal-nb: Adds implementations of embedded-hal-nb traits for the UART driver.
  • embedded-io: Adds implementations of embedded-io traits for the UART driver.

Future plans

  • Handling modem control and status signals
  • Adding peripheral testing

License

The project is MIT and Apache-2.0 dual licensed, see LICENSE-APACHE and LICENSE-MIT.

Maintainers

arm-pl011-uart is a trustedfirmware.org maintained project. All contributions are ultimately merged by the maintainers listed below.

Contributing

Please follow the directions of the Trusted Firmware Processes

Contributions are handled through review.trustedfirmware.org.

Arm trademark notice

Arm is a registered trademark of Arm Limited (or its subsidiaries or affiliates).

This project uses some of the Arm product, service or technology trademarks, as listed in the Trademark List, in accordance with the Arm Trademark Use Guidelines.

Subsequent uses of these trademarks throughout this repository do not need to be prefixed with the Arm word trademark.

Copyright The arm-pl011-uart Contributors.