diff --git a/src/lib.rs b/src/lib.rs
index ef4dd83..b23e7d1 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -7,10 +7,12 @@
 
 #![no_std]
 
-use core::ops::Deref;
+use core::{
+    ops::{Deref, DerefMut},
+    ptr::addr_of_mut,
+};
 
 use bitflags::bitflags;
-use volatile_register::{RO, RW, WO};
 
 bitflags! {
     /// Control register
@@ -41,45 +43,45 @@
 /// SP805 register map
 #[repr(C, align(4))]
 pub struct SP805Registers {
-    wdog_load: RW<u32>,       // 0x000 Load Register
-    wdog_value: RO<u32>,      // 0x004 Value Register
-    wdog_control: RW<u32>,    // 0x008 Control register
-    wdog_intclr: WO<u32>,     // 0x00c Interrupt Clear Register
-    wdog_ris: RO<u32>,        // 0x010 Raw Interrupt Status Register
-    wdog_mis: RO<u32>,        // 0x014 Masked Interrupt Status Register
+    wdog_load: u32,           // 0x000 Load Register
+    wdog_value: u32,          // 0x004 Value Register
+    wdog_control: u32,        // 0x008 Control register
+    wdog_intclr: u32,         // 0x00c Interrupt Clear Register
+    wdog_ris: u32,            // 0x010 Raw Interrupt Status Register
+    wdog_mis: u32,            // 0x014 Masked Interrupt Status Register
     reserved_18: [u32; 762],  // 0x018 - 0xbfc
-    wdog_lock: RW<u32>,       // 0xc00 Lock Register
+    wdog_lock: u32,           // 0xc00 Lock Register
     reserved_c04: [u32; 191], // 0xc04 - 0xefc
-    wdog_itcr: RW<u32>,       // 0xf00 Integration Test Control Register,
-    wdog_itop: WO<u32>,       // 0xf04 Integration Test Output Set
+    wdog_itcr: u32,           // 0xf00 Integration Test Control Register,
+    wdog_itop: u32,           // 0xf04 Integration Test Output Set
     reserved_f08: [u32; 54],  // 0xf08 - 0xfdc
-    wdog_periph_id0: RO<u32>, // 0xfe0 Peripheral Identification Register 0
-    wdog_periph_id1: RO<u32>, // 0xfe4 Peripheral Identification Register 1
-    wdog_periph_id2: RO<u32>, // 0xfe8 Peripheral Identification Register 2
-    wdog_periph_id3: RO<u32>, // 0xfec Peripheral Identification Register 3
-    wdog_pcell_id0: RO<u32>,  // 0xff0 PrimeCell Identification Register 0
-    wdog_pcell_id1: RO<u32>,  // 0xff4 PrimeCell Identification Register 1
-    wdog_pcell_id2: RO<u32>,  // 0xff8 PrimeCell Identification Register 2
-    wdog_pcell_id3: RO<u32>,  // 0xffc PrimeCell Identification Register 3
+    wdog_periph_id0: u32,     // 0xfe0 Peripheral Identification Register 0
+    wdog_periph_id1: u32,     // 0xfe4 Peripheral Identification Register 1
+    wdog_periph_id2: u32,     // 0xfe8 Peripheral Identification Register 2
+    wdog_periph_id3: u32,     // 0xfec Peripheral Identification Register 3
+    wdog_pcell_id0: u32,      // 0xff0 PrimeCell Identification Register 0
+    wdog_pcell_id1: u32,      // 0xff4 PrimeCell Identification Register 1
+    wdog_pcell_id2: u32,      // 0xff8 PrimeCell Identification Register 2
+    wdog_pcell_id3: u32,      // 0xffc PrimeCell Identification Register 3
 }
 
 struct WatchdogUnlockGuard<'a, R>
 where
-    R: Deref<Target = SP805Registers>,
+    R: DerefMut<Target = SP805Registers>,
 {
-    regs: &'a R,
+    regs: &'a mut R,
 }
 
 impl<'a, R> WatchdogUnlockGuard<'a, R>
 where
-    R: Deref<Target = SP805Registers>,
+    R: DerefMut<Target = SP805Registers>,
 {
     const LOCK: u32 = 0x00000001;
     const UNLOCK: u32 = 0x1ACCE551;
 
-    pub fn new(regs: &'a R) -> Self {
+    pub fn new(regs: &'a mut R) -> Self {
         unsafe {
-            regs.wdog_lock.write(Self::UNLOCK);
+            addr_of_mut!(regs.wdog_lock).write_volatile(Self::UNLOCK);
         }
         Self { regs }
     }
@@ -87,7 +89,7 @@
 
 impl<'a, R> Deref for WatchdogUnlockGuard<'a, R>
 where
-    R: Deref<Target = SP805Registers>,
+    R: DerefMut<Target = SP805Registers>,
 {
     type Target = R;
 
@@ -96,13 +98,22 @@
     }
 }
 
+impl<'a, R> DerefMut for WatchdogUnlockGuard<'a, R>
+where
+    R: DerefMut<Target = SP805Registers>,
+{
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        self.regs
+    }
+}
+
 impl<'a, R> Drop for WatchdogUnlockGuard<'a, R>
 where
-    R: Deref<Target = SP805Registers>,
+    R: DerefMut<Target = SP805Registers>,
 {
     fn drop(&mut self) {
         unsafe {
-            self.regs.wdog_lock.write(Self::LOCK);
+            addr_of_mut!(self.regs.wdog_lock).write_volatile(Self::LOCK);
         }
     }
 }
@@ -118,7 +129,7 @@
 
 impl<R> Watchdog<R>
 where
-    R: Deref<Target = SP805Registers>,
+    R: DerefMut<Target = SP805Registers>,
 {
     /// Create new watchdog instance
     pub fn new(regs: R, load_value: u32) -> Self {
@@ -126,34 +137,36 @@
     }
 
     /// Enable watchdog
-    pub fn enable(&self) {
-        let regs = self.unlock();
+    pub fn enable(&mut self) {
+        let load_value = self.load_value;
+        let mut regs = self.unlock();
 
         unsafe {
-            regs.wdog_load.write(self.load_value);
-            regs.wdog_intclr.write(1);
-            regs.wdog_control
-                .write((ControlRegister::INTEN | ControlRegister::RESEN).bits());
+            addr_of_mut!(regs.wdog_load).write_volatile(load_value);
+            addr_of_mut!(regs.wdog_intclr).write_volatile(1);
+            addr_of_mut!(regs.wdog_control)
+                .write_volatile((ControlRegister::INTEN | ControlRegister::RESEN).bits());
         }
     }
 
     /// Disable watchdog
-    pub fn disable(&self) {
+    pub fn disable(&mut self) {
         unsafe {
-            self.unlock()
-                .wdog_control
-                .write(ControlRegister::empty().bits());
+            addr_of_mut!(self.unlock().wdog_control)
+                .write_volatile(ControlRegister::empty().bits());
         }
     }
 
     /// Update watchdog
-    pub fn update(&self) {
+    pub fn update(&mut self) {
+        let load_value = self.load_value;
+
         unsafe {
-            self.unlock().wdog_load.write(self.load_value);
+            addr_of_mut!(self.unlock().wdog_load).write_volatile(load_value);
         }
     }
 
-    fn unlock(&self) -> WatchdogUnlockGuard<R> {
-        WatchdogUnlockGuard::new(&self.regs)
+    fn unlock(&mut self) -> WatchdogUnlockGuard<R> {
+        WatchdogUnlockGuard::new(&mut self.regs)
     }
 }