Place assembler functions in separate sections
This extends the --gc-sections behaviour to the many assembler
support functions in the firmware images by placing each function
into its own code section. This is achieved by creating a 'func'
macro used to declare each function label.
Fixes ARM-software/tf-issues#80
Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
diff --git a/arch/aarch64/cpu/cpu_helpers.S b/arch/aarch64/cpu/cpu_helpers.S
index 009f08a..573d0b8 100644
--- a/arch/aarch64/cpu/cpu_helpers.S
+++ b/arch/aarch64/cpu/cpu_helpers.S
@@ -29,13 +29,12 @@
*/
#include <arch.h>
+#include <asm_macros.S>
.weak cpu_reset_handler
- .section .text, "ax"; .align 3
-
-cpu_reset_handler: ; .type cpu_reset_handler, %function
+func cpu_reset_handler
mov x19, x30 // lr
/* ---------------------------------------------
diff --git a/arch/system/gic/aarch64/gic_v3_sysregs.S b/arch/system/gic/aarch64/gic_v3_sysregs.S
index d686aeb..2a96da7 100644
--- a/arch/system/gic/aarch64/gic_v3_sysregs.S
+++ b/arch/system/gic/aarch64/gic_v3_sysregs.S
@@ -28,6 +28,8 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include <asm_macros.S>
+
.globl read_icc_sre_el1
.globl read_icc_sre_el2
.globl read_icc_sre_el3
@@ -48,42 +50,40 @@
#define ICC_CTLR_EL3 S3_6_C12_C12_4
#define ICC_PMR_EL1 S3_0_C4_C6_0
- .section .text, "ax"; .align 3
-
-read_icc_sre_el1: ; .type read_icc_sre_el1, %function
+func read_icc_sre_el1
mrs x0, ICC_SRE_EL1
ret
-read_icc_sre_el2: ; .type read_icc_sre_el2, %function
+func read_icc_sre_el2
mrs x0, ICC_SRE_EL2
ret
-read_icc_sre_el3: ; .type read_icc_sre_el3, %function
+func read_icc_sre_el3
mrs x0, ICC_SRE_EL3
ret
-write_icc_sre_el1: ; .type write_icc_sre_el1, %function
+func write_icc_sre_el1
msr ICC_SRE_EL1, x0
isb
ret
-write_icc_sre_el2: ; .type write_icc_sre_el2, %function
+func write_icc_sre_el2
msr ICC_SRE_EL2, x0
isb
ret
-write_icc_sre_el3: ; .type write_icc_sre_el3, %function
+func write_icc_sre_el3
msr ICC_SRE_EL3, x0
isb
ret
-write_icc_pmr_el1: ; .type write_icc_pmr_el1, %function
+func write_icc_pmr_el1
msr ICC_PMR_EL1, x0
isb
ret