commit | 1b491eead580d7849a45a38f2c6a935a5d8d1160 | [log] [tgz] |
---|---|---|
author | Elyes Haouas <ehaouas@noos.fr> | Mon Feb 13 09:14:48 2023 +0100 |
committer | Manish Pandey <manish.pandey2@arm.com> | Tue May 09 15:57:12 2023 +0100 |
tree | 5085dd0af7deed3a5a52dbcd82a78aa5cd96e888 | |
parent | 8557d491b6dbd6cbf27cc2ae6425f6cb29ca2c35 [diff] [blame] |
fix(tree): correct some typos found using codespell (https://github.com/codespell-project/codespell). Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c index 32a35ef..71e0af1 100644 --- a/plat/imx/imx8m/gpc_common.c +++ b/plat/imx/imx8m/gpc_common.c
@@ -98,7 +98,7 @@ /* assert the pcg pcr bit of the core */ mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); } else { - /* disbale CORE WFI PDN & IRQ PUP */ + /* disable CORE WFI PDN & IRQ PUP */ mmio_clrbits_32(IMX_GPC_BASE + LPCR_A53_AD, COREx_WFI_PDN(core_id) | COREx_IRQ_WUP(core_id)); /* deassert the pcg pcr bit of the core */