diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c
index d4fd81b..b0c011e 100644
--- a/plat/fvp/bl1_plat_setup.c
+++ b/plat/fvp/bl1_plat_setup.c
@@ -112,11 +112,25 @@
  ******************************************************************************/
 void bl1_platform_setup(void)
 {
+	unsigned int counter_base_frequency;
+
 	/* Initialise the IO layer and register platform IO devices */
 	io_setup();
 
-	/* Enable and initialize the System level generic timer */
-	mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN);
+	/*
+	 * Enable and initialize the System level generic timer. Choose base
+	 * frequency for the timer
+	 */
+	mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_FCREQ(0) | CNTCR_EN);
+
+	/* Read the frequency from Frequency modes table */
+	counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
+
+	/* The first entry of the frequency modes table must not be 0 */
+	assert(counter_base_frequency != 0);
+
+	/* Program the counter frequency */
+	write_cntfrq_el0(counter_base_frequency);
 }
 
 
diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c
index 01b0a45..1b24687 100644
--- a/plat/fvp/bl31_plat_setup.c
+++ b/plat/fvp/bl31_plat_setup.c
@@ -30,7 +30,8 @@
 
 #include <platform.h>
 #include <fvp_pwrc.h>
-#include <bl_common.h>
+#include <assert.h>
+#include <arch_helpers.h>
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -125,6 +126,7 @@
 void bl31_platform_setup()
 {
 	unsigned int reg_val;
+	unsigned int counter_base_frequency;
 
 	/* Initialize the gic cpu and distributor interfaces */
 	gic_setup();
@@ -138,6 +140,15 @@
 	mmio_write_32(VE_SYSREGS_BASE + V2M_SYS_CFGCTRL,
 		      (1ull << 31) | (1 << 30) | (7 << 20) | (0 << 16));
 
+	/* Read the frequency from Frequency modes table */
+	counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
+
+	/* The first entry of the frequency modes table must not be 0 */
+	assert(counter_base_frequency != 0);
+
+	/* Program the counter frequency */
+	write_cntfrq_el0(counter_base_frequency);
+
 	/* Allow access to the System counter timer module */
 	reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
 	reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);