feat(fgt2): add support for FEAT_FGT2
This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a
diff --git a/include/lib/el3_runtime/context_el2.h b/include/lib/el3_runtime/context_el2.h
index d25ab81..ca1ea4e 100644
--- a/include/lib/el3_runtime/context_el2.h
+++ b/include/lib/el3_runtime/context_el2.h
@@ -62,6 +62,14 @@
uint64_t hfgwtr_el2;
} el2_fgt_regs_t;
+typedef struct el2_fgt2_regs {
+ uint64_t hdfgrtr2_el2;
+ uint64_t hdfgwtr2_el2;
+ uint64_t hfgitr2_el2;
+ uint64_t hfgrtr2_el2;
+ uint64_t hfgwtr2_el2;
+} el2_fgt2_regs_t;
+
typedef struct el2_ecv_regs {
uint64_t cntpoff_el2;
} el2_ecv_regs_t;
@@ -140,6 +148,10 @@
el2_fgt_regs_t fgt;
#endif
+#if ENABLE_FEAT_FGT2
+ el2_fgt2_regs_t fgt2;
+#endif
+
#if ENABLE_FEAT_ECV
el2_ecv_regs_t ecv;
#endif
@@ -221,6 +233,15 @@
#define write_el2_ctx_fgt(ctx, reg, val)
#endif /* ENABLE_FEAT_FGT */
+#if ENABLE_FEAT_FGT2
+#define read_el2_ctx_fgt2(ctx, reg) (((ctx)->fgt2).reg)
+#define write_el2_ctx_fgt2(ctx, reg, val) ((((ctx)->fgt2).reg) \
+ = (uint64_t) (val))
+#else
+#define read_el2_ctx_fgt2(ctx, reg) ULL(0)
+#define write_el2_ctx_fgt2(ctx, reg, val)
+#endif /* ENABLE_FEAT_FGT */
+
#if ENABLE_FEAT_ECV
#define read_el2_ctx_ecv(ctx, reg) (((ctx)->ecv).reg)
#define write_el2_ctx_ecv(ctx, reg, val) ((((ctx)->ecv).reg) \