tree e67ff91d56c96c044e34efd5f06dd33128aea89c
parent 77feb745e42296c553c33bcaea5be3304168eff3
author Govindraj Raja <govindraj.raja@arm.com> 1737505497 -0600
committer Govindraj Raja <govindraj.raja@arm.com> 1738612670 -0600

fix(cpus): workaround for Cortex-X4 erratum 3701758

Cortex-X4 erratum 3701758 that applies to r0p0, r0p1, r0p2 and r0p3
is still Open.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/109148/latest/

Change-Id: I4ee941d1e7653de7a12d69f538ca05f7f9f9961d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>