PSCI: Remove references to affinity based power management
As per Section 4.2.2. in the PSCI specification, the term "affinity"
is used in the context of describing the hierarchical arrangement
of cores. This often, but not always, maps directly to the processor
power domain topology of the system. The current PSCI implementation
assumes that this is always the case i.e. MPIDR based levels of
affinity always map to levels in a power domain topology tree.
This patch is the first in a series of patches which remove this
assumption. It removes all occurences of the terms "affinity
instances and levels" when used to describe the power domain
topology. Only the terminology is changed in this patch. Subsequent
patches will implement functional changes to remove the above
mentioned assumption.
Change-Id: Iee162f051b228828310610c5a320ff9d31009b4e
diff --git a/services/std_svc/psci1.0/psci_private.h b/services/std_svc/psci1.0/psci_private.h
index 7797fa7..e56d848 100644
--- a/services/std_svc/psci1.0/psci_private.h
+++ b/services/std_svc/psci1.0/psci_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,14 +41,17 @@
* Lock API.
*/
#if USE_COHERENT_MEM
-#define psci_lock_init(aff_map, idx) bakery_lock_init(&(aff_map)[(idx)].lock)
+#define psci_lock_init(pwr_map, idx) bakery_lock_init(&(pwr_map)[(idx)].lock)
#define psci_lock_get(node) bakery_lock_get(&((node)->lock))
#define psci_lock_release(node) bakery_lock_release(&((node)->lock))
#else
-#define psci_lock_init(aff_map, idx) ((aff_map)[(idx)].aff_map_index = (idx))
-#define psci_lock_get(node) bakery_lock_get((node)->aff_map_index, \
+#define psci_lock_init(pwr_map, idx) \
+ ((pwr_map)[(idx)].pwr_domain_index = (idx))
+#define psci_lock_get(node) \
+ bakery_lock_get((node)->pwr_domain_index,\
CPU_DATA_PSCI_LOCK_OFFSET)
-#define psci_lock_release(node) bakery_lock_release((node)->aff_map_index,\
+#define psci_lock_release(node) \
+ bakery_lock_release((node)->pwr_domain_index,\
CPU_DATA_PSCI_LOCK_OFFSET)
#endif
@@ -75,9 +78,9 @@
/*******************************************************************************
* The following two data structures hold the topology tree which in turn tracks
- * the state of the all the affinity instances supported by the platform.
+ * the state of the all the power domain instances supported by the platform.
******************************************************************************/
-typedef struct aff_map_node {
+typedef struct pwr_map_node {
unsigned long mpidr;
unsigned char ref_count;
unsigned char state;
@@ -86,25 +89,25 @@
bakery_lock_t lock;
#else
/* For indexing the bakery_info array in per CPU data */
- unsigned char aff_map_index;
+ unsigned char pwr_domain_index;
#endif
-} aff_map_node_t;
+} pwr_map_node_t;
-typedef struct aff_limits_node {
+typedef struct pwr_lvl_limits_node {
int min;
int max;
-} aff_limits_node_t;
+} pwr_lvl_limits_node_t;
-typedef aff_map_node_t (*mpidr_aff_map_nodes_t[MPIDR_MAX_AFFLVL + 1]);
-typedef void (*afflvl_power_on_finisher_t)(aff_map_node_t *mpidr_nodes[],
- int afflvl);
+typedef pwr_map_node_t (*mpidr_pwr_map_nodes_t[MPIDR_MAX_AFFLVL + 1]);
+typedef void (*pwrlvl_power_on_finisher_t)(pwr_map_node_t *mpidr_nodes[],
+ int pwrlvl);
/*******************************************************************************
* Data prototypes
******************************************************************************/
extern const plat_pm_ops_t *psci_plat_pm_ops;
-extern aff_map_node_t psci_aff_map[PSCI_NUM_AFFS];
-extern aff_limits_node_t psci_aff_limits[MPIDR_MAX_AFFLVL + 1];
+extern pwr_map_node_t psci_pwr_domain_map[PSCI_NUM_PWR_DOMAINS];
+extern pwr_lvl_limits_node_t psci_pwr_domain_map[MPIDR_MAX_AFFLVL + 1];
extern uint32_t psci_caps;
/*******************************************************************************
@@ -116,61 +119,61 @@
* Function prototypes
******************************************************************************/
/* Private exported functions from psci_common.c */
-unsigned short psci_get_state(aff_map_node_t *node);
-unsigned short psci_get_phys_state(aff_map_node_t *node);
-void psci_set_state(aff_map_node_t *node, unsigned short state);
-unsigned long mpidr_set_aff_inst(unsigned long, unsigned char, int);
+unsigned short psci_get_state(pwr_map_node_t *node);
+unsigned short psci_get_phys_state(pwr_map_node_t *node);
+void psci_set_state(pwr_map_node_t *node, unsigned short state);
+unsigned long mpidr_set_pwr_domain_inst(unsigned long, unsigned char, int);
int psci_validate_mpidr(unsigned long, int);
-int get_power_on_target_afflvl(void);
-void psci_afflvl_power_on_finish(int end_afflvl,
- afflvl_power_on_finisher_t pon_handler);
+int get_power_on_target_pwrlvl(void);
+void psci_power_up_finish(int end_pwrlvl,
+ pwrlvl_power_on_finisher_t pon_handler);
int psci_get_ns_ep_info(entry_point_info_t *ep,
uint64_t entrypoint, uint64_t context_id);
-int psci_check_afflvl_range(int start_afflvl, int end_afflvl);
-void psci_do_afflvl_state_mgmt(uint32_t start_afflvl,
- uint32_t end_afflvl,
- aff_map_node_t *mpidr_nodes[],
+int psci_check_pwrlvl_range(int start_pwrlvl, int end_pwrlvl);
+void psci_do_state_coordination(uint32_t start_pwrlvl,
+ uint32_t end_pwrlvl,
+ pwr_map_node_t *mpidr_nodes[],
uint32_t state);
-void psci_acquire_afflvl_locks(int start_afflvl,
- int end_afflvl,
- aff_map_node_t *mpidr_nodes[]);
-void psci_release_afflvl_locks(int start_afflvl,
- int end_afflvl,
- mpidr_aff_map_nodes_t mpidr_nodes);
-void psci_print_affinity_map(void);
-uint32_t psci_find_max_phys_off_afflvl(uint32_t start_afflvl,
- uint32_t end_afflvl,
- aff_map_node_t *mpidr_nodes[]);
+void psci_acquire_pwr_domain_locks(int start_pwrlvl,
+ int end_pwrlvl,
+ pwr_map_node_t *mpidr_nodes[]);
+void psci_release_pwr_domain_locks(int start_pwrlvl,
+ int end_pwrlvl,
+ mpidr_pwr_map_nodes_t mpidr_nodes);
+void psci_print_power_domain_map(void);
+uint32_t psci_find_max_phys_off_pwrlvl(uint32_t start_pwrlvl,
+ uint32_t end_pwrlvl,
+ pwr_map_node_t *mpidr_nodes[]);
unsigned int psci_is_last_on_cpu(void);
int psci_spd_migrate_info(uint64_t *mpidr);
/* Private exported functions from psci_setup.c */
-int psci_get_aff_map_nodes(unsigned long mpidr,
- int start_afflvl,
- int end_afflvl,
- aff_map_node_t *mpidr_nodes[]);
-aff_map_node_t *psci_get_aff_map_node(unsigned long, int);
+int psci_get_pwr_map_nodes(unsigned long mpidr,
+ int start_pwrlvl,
+ int end_pwrlvl,
+ pwr_map_node_t *mpidr_nodes[]);
+pwr_map_node_t *psci_get_pwr_map_node(unsigned long, int);
-/* Private exported functions from psci_affinity_on.c */
-int psci_afflvl_on(unsigned long target_cpu,
+/* Private exported functions from psci_cpu_on.c */
+int psci_cpu_on_start(unsigned long target_cpu,
entry_point_info_t *ep,
- int end_afflvl);
+ int end_pwrlvl);
-void psci_afflvl_on_finisher(aff_map_node_t *node[], int afflvl);
+void psci_cpu_on_finish(pwr_map_node_t *node[], int pwrlvl);
-/* Private exported functions from psci_affinity_off.c */
-int psci_afflvl_off(int end_afflvl);
+/* Private exported functions from psci_cpu_off.c */
+int psci_do_cpu_off(int end_pwrlvl);
-/* Private exported functions from psci_affinity_suspend.c */
-void psci_afflvl_suspend(entry_point_info_t *ep,
- int end_afflvl);
+/* Private exported functions from psci_cpu_suspend.c */
+void psci_cpu_suspend_start(entry_point_info_t *ep,
+ int end_pwrlvl);
-void psci_afflvl_suspend_finisher(aff_map_node_t *node[], int afflvl);
+void psci_cpu_suspend_finish(pwr_map_node_t *node[], int pwrlvl);
void psci_set_suspend_power_state(unsigned int power_state);
/* Private exported functions from psci_helpers.S */
-void psci_do_pwrdown_cache_maintenance(uint32_t affinity_level);
+void psci_do_pwrdown_cache_maintenance(uint32_t pwr_level);
void psci_do_pwrup_cache_maintenance(void);
/* Private exported functions from psci_system_off.c */