Use ARM CCI driver on FVP and Juno platforms
This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.
Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index ddaacba..a8afb4e 100644
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -32,7 +32,7 @@
#include <arch_helpers.h>
#include <arm_gic.h>
#include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
#include <debug.h>
#include <mmio.h>
#include <platform.h>
@@ -295,6 +295,12 @@
return counter_base_frequency;
}
+/* Map of CCI masters with the slave interfaces they are connected */
+static const int cci_map[] = {
+ CCI400_CLUSTER0_SL_IFACE_IX,
+ CCI400_CLUSTER1_SL_IFACE_IX
+};
+
void fvp_cci_init(void)
{
/*
@@ -302,19 +308,20 @@
*/
if (plat_config.flags & CONFIG_HAS_CCI)
cci_init(CCI400_BASE,
- CCI400_SL_IFACE3_CLUSTER_IX,
- CCI400_SL_IFACE4_CLUSTER_IX);
+ cci_map,
+ ARRAY_SIZE(cci_map));
}
void fvp_cci_enable(void)
{
- /*
- * Enable CCI-400 coherency for this cluster. No need
- * for locks as no other cpu is active at the
- * moment
- */
if (plat_config.flags & CONFIG_HAS_CCI)
- cci_enable_cluster_coherency(read_mpidr());
+ cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
+}
+
+void fvp_cci_disable(void)
+{
+ if (plat_config.flags & CONFIG_HAS_CCI)
+ cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
}
void fvp_gic_init(void)