diff --git a/drivers/marvell/gwin.c b/drivers/marvell/gwin.c
index 9d94308..fa59cb0 100644
--- a/drivers/marvell/gwin.c
+++ b/drivers/marvell/gwin.c
@@ -7,6 +7,9 @@
 
 /* GWIN unit device driver for Marvell AP810 SoC */
 
+#include <inttypes.h>
+#include <stdint.h>
+
 #include <common/debug.h>
 #include <drivers/marvell/gwin.h>
 #include <lib/mmio.h>
@@ -49,14 +52,14 @@
 	/* The base is always 64M aligned */
 	if (IS_NOT_ALIGN(win->base_addr, GWIN_ALIGNMENT_64M)) {
 		win->base_addr &= ~(GWIN_ALIGNMENT_64M - 1);
-		NOTICE("%s: Align the base address to 0x%llx\n",
+		NOTICE("%s: Align the base address to 0x%" PRIx64 "\n",
 		       __func__, win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (IS_NOT_ALIGN(win->win_size, GWIN_ALIGNMENT_64M)) {
 		win->win_size = ALIGN_UP(win->win_size, GWIN_ALIGNMENT_64M);
-		NOTICE("%s: Aligning window size to 0x%llx\n",
+		NOTICE("%s: Aligning window size to 0x%" PRIx64 "\n",
 		       __func__, win->win_size);
 	}
 }
@@ -167,7 +170,7 @@
 			alr = (alr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
 			ahr = mmio_read_32(GWIN_AHR_OFFSET(ap_index, win_num));
 			ahr = (ahr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
-			printf("\tgwin   %d     0x%016llx 0x%016llx\n",
+			printf("\tgwin   %d     0x%016" PRIx64 " 0x%016" PRIx64 "\n",
 			       (cr >> 8) & 0xF, alr, ahr);
 		}
 	}