ARMv8 Trusted Firmware release v0.2
diff --git a/lib/arch/aarch64/tlb_helpers.S b/lib/arch/aarch64/tlb_helpers.S
new file mode 100644
index 0000000..8377f2c
--- /dev/null
+++ b/lib/arch/aarch64/tlb_helpers.S
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2013, ARM Limited. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch_helpers.h>
+
+	.globl	tlbiall
+	.globl	tlbiallis
+	.globl	tlbialle1
+	.globl	tlbialle1is
+	.globl	tlbialle2
+	.globl	tlbialle2is
+	.globl	tlbialle3
+	.globl	tlbialle3is
+	.globl	tlbivmalle1
+
+
+	.section	.text, "ax"
+
+tlbiall:; .type tlbiall, %function
+	mrs	x0, CurrentEl
+	cmp	x0, #(MODE_EL1 << MODE_EL_SHIFT)
+	b.eq	tlbialle1
+	cmp	x0, #(MODE_EL2 << MODE_EL_SHIFT)
+	b.eq	tlbialle2
+	cmp	x0, #(MODE_EL3 << MODE_EL_SHIFT)
+	b.eq	tlbialle3
+
+
+tlbiallis:; .type tlbiallis, %function
+	mrs	x0, CurrentEl
+	cmp	x0, #(MODE_EL1 << MODE_EL_SHIFT)
+	b.eq	tlbialle1is
+	cmp	x0, #(MODE_EL2 << MODE_EL_SHIFT)
+	b.eq	tlbialle2is
+	cmp	x0, #(MODE_EL3 << MODE_EL_SHIFT)
+	b.eq	tlbialle3is
+
+
+tlbialle1:; .type tlbialle1, %function
+	tlbi	alle1
+	dsb	sy
+	isb
+	ret
+
+
+tlbialle1is:; .type tlbialle1is, %function
+	tlbi	alle1is
+	dsb	sy
+	isb
+	ret
+
+
+tlbialle2:; .type tlbialle2, %function
+	tlbi	alle2
+	dsb	sy
+	isb
+	ret
+
+
+tlbialle2is:; .type tlbialle2is, %function
+	tlbi	alle2is
+	dsb	sy
+	isb
+	ret
+
+
+tlbialle3:; .type tlbialle3, %function
+	tlbi	alle3
+	dsb	sy
+	isb
+	ret
+
+
+tlbialle3is:; .type tlbialle3is, %function
+	tlbi	alle3is
+	dsb	sy
+	isb
+	ret
+
+tlbivmalle1:; .type tlbivmalle1, %function
+	tlbi	vmalle1
+	dsb	sy
+	isb
+	ret