FVP: apply new naming conventions to memory regions
Secure ROM at address 0x0000_0000 is defined as FVP_TRUSTED_ROM
Secure RAM at address 0x0400_0000 is defined as FVP_TRUSTED_SRAM
Secure RAM at address 0x0600_0000 is defined as FVP_TRUSTED_DRAM
BLn_BASE and BLn_LIMIT definitions have been updated and are based on
these new memory regions.
The available memory for each bootloader in the linker script is
defined by BLn_BASE and BLn_LIMIT, instead of the complete memory
region.
TZROM_BASE/SIZE and TZRAM_BASE/SIZE are no longer required as part of
the platform porting.
FVP common definitions are defined in fvp_def.h while platform_def.h
contains exclusively (with a few exceptions) the definitions that are
mandatory in the porting guide. Therefore, platform_def.h now includes
fvp_def.h instead of the other way around.
Porting guide has been updated to reflect these changes.
Change-Id: I39a6088eb611fc4a347db0db4b8f1f0417dbab05
diff --git a/plat/fvp/include/platform_def.h b/plat/fvp/include/platform_def.h
index 70f84bb..3b94c42 100644
--- a/plat/fvp/include/platform_def.h
+++ b/plat/fvp/include/platform_def.h
@@ -32,6 +32,7 @@
#define __PLATFORM_DEF_H__
#include <arch.h>
+#include <../fvp_def.h>
/*******************************************************************************
@@ -74,31 +75,22 @@
#define MAX_IO_HANDLES 4
/*******************************************************************************
- * Platform memory map related constants
- ******************************************************************************/
-#define TZROM_BASE 0x00000000
-#define TZROM_SIZE 0x04000000
-
-#define TZRAM_BASE 0x04000000
-#define TZRAM_SIZE 0x40000
-
-/* Location of trusted dram on the base fvp */
-#define TZDRAM_BASE 0x06000000
-#define TZDRAM_SIZE 0x02000000
-
-/*******************************************************************************
* BL1 specific defines.
* BL1 RW data is relocated from ROM to RAM at runtime so we need 2 sets of
* addresses.
******************************************************************************/
-#define BL1_RO_BASE TZROM_BASE
-#define BL1_RO_LIMIT (TZROM_BASE + TZROM_SIZE)
+#define BL1_RO_BASE FVP_TRUSTED_ROM_BASE
+#define BL1_RO_LIMIT (FVP_TRUSTED_ROM_BASE \
+ + FVP_TRUSTED_ROM_SIZE)
/*
* Put BL1 RW at the top of the Trusted SRAM. BL1_RW_BASE is calculated using
* the current BL1 RW debug size plus a little space for growth.
*/
-#define BL1_RW_BASE (TZRAM_BASE + TZRAM_SIZE - 0x6000)
-#define BL1_RW_LIMIT (TZRAM_BASE + TZRAM_SIZE)
+#define BL1_RW_BASE (FVP_TRUSTED_SRAM_BASE + \
+ FVP_TRUSTED_SRAM_SIZE - \
+ 0x6000)
+#define BL1_RW_LIMIT (FVP_TRUSTED_SRAM_BASE + \
+ FVP_TRUSTED_SRAM_SIZE)
/*******************************************************************************
* BL2 specific defines.
@@ -117,9 +109,12 @@
* Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
* current BL3-1 debug size plus a little space for growth.
*/
-#define BL31_BASE (TZRAM_BASE + TZRAM_SIZE - 0x1D000)
+#define BL31_BASE (FVP_TRUSTED_SRAM_BASE + \
+ FVP_TRUSTED_SRAM_SIZE - \
+ 0x1D000)
#define BL31_PROGBITS_LIMIT BL1_RW_BASE
-#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
+#define BL31_LIMIT (FVP_TRUSTED_SRAM_BASE + \
+ FVP_TRUSTED_SRAM_SIZE)
/*******************************************************************************
* BL32 specific defines.
@@ -127,22 +122,19 @@
/*
* On FVP, the TSP can execute either from Trusted SRAM or Trusted DRAM.
*/
-#define TSP_IN_TZRAM 0
-#define TSP_IN_TZDRAM 1
-
-#if TSP_RAM_LOCATION_ID == TSP_IN_TZRAM
-# define TSP_SEC_MEM_BASE TZRAM_BASE
-# define TSP_SEC_MEM_SIZE TZRAM_SIZE
-# define BL32_BASE TZRAM_BASE
+#if FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_SRAM
+# define TSP_SEC_MEM_BASE FVP_TRUSTED_SRAM_BASE
+# define TSP_SEC_MEM_SIZE FVP_TRUSTED_SRAM_SIZE
+# define BL32_BASE FVP_TRUSTED_SRAM_BASE
# define BL32_PROGBITS_LIMIT BL2_BASE
# define BL32_LIMIT BL31_BASE
-#elif TSP_RAM_LOCATION_ID == TSP_IN_TZDRAM
-# define TSP_SEC_MEM_BASE TZDRAM_BASE
-# define TSP_SEC_MEM_SIZE TZDRAM_SIZE
-# define BL32_BASE (TZDRAM_BASE + 0x2000)
-# define BL32_LIMIT (TZDRAM_BASE + (1 << 21))
+#elif FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_DRAM
+# define TSP_SEC_MEM_BASE FVP_TRUSTED_DRAM_BASE
+# define TSP_SEC_MEM_SIZE FVP_TRUSTED_DRAM_SIZE
+# define BL32_BASE (FVP_TRUSTED_DRAM_BASE + 0x2000)
+# define BL32_LIMIT (FVP_TRUSTED_DRAM_BASE + (1 << 21))
#else
-# error "Unsupported TSP_RAM_LOCATION_ID value"
+# error "Unsupported FVP_TSP_RAM_LOCATION_ID value"
#endif
/*******************************************************************************