diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index fd4809c..59a255e 100644
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -155,7 +155,9 @@
 	 * Allow access to the System counter timer module and program
 	 * counter frequency for non secure images during FWU
 	 */
+#ifdef ARM_SYS_TIMCTL_BASE
 	arm_configure_sys_timer();
+#endif
 	write_cntfrq_el0(plat_get_syscnt_freq2());
 }
 
diff --git a/plat/arm/common/arm_dyn_cfg.c b/plat/arm/common/arm_dyn_cfg.c
index 1c58649..9a53649 100644
--- a/plat/arm/common/arm_dyn_cfg.c
+++ b/plat/arm/common/arm_dyn_cfg.c
@@ -243,10 +243,11 @@
 			if (check_uptr_overflow(image_base, image_size))
 				continue;
 
+#ifdef	BL31_BASE
 			/* Ensure the configs don't overlap with BL31 */
 			if ((image_base > BL31_BASE) || ((image_base + image_size) > BL31_BASE))
 				continue;
-
+#endif
 			/* Ensure the configs are loaded in a valid address */
 			if (image_base < ARM_BL_RAM_BASE)
 				continue;
diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index c0ea027..bb69914 100644
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -193,12 +193,14 @@
 #endif
 
 	/* Enable and initialize the System level generic timer */
+#ifdef ARM_SYS_CNTCTL_BASE
 	mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
 			CNTCR_FCREQ(0U) | CNTCR_EN);
-
+#endif
+#ifdef ARM_SYS_TIMCTL_BASE
 	/* Allow access to the System counter timer module */
 	arm_configure_sys_timer();
-
+#endif
 	/* Initialize power controller before setting up topology */
 	plat_arm_pwrc_setup();
 }