FVP: map non-secure DRAM1 in the MMU
This patch maps the non-secure region of DRAM1 in the MMU. The
non-secure region comprises the whole DRAM1 (0x80000000 -
0xffffffff) excluding the top 16 MB (0xff000000 - 0xffffffff).
The TrustZone controller configures this 16 MB region as secure
memory, so it can not be accessed in non-secure mode.
The number of MMU tables in BL2 has been increased to 3 because
the new size of the non-secure region in DRAM requires an extra L2
table.
Change-Id: I5ad080c6e181f6b6060e15cebb1d18b7fa128cf5
diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index 987f48f..86b0596 100644
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -66,8 +66,8 @@
DEVICE1_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
-#define MAP_DRAM1 MAP_REGION_FLAT(DRAM1_BASE, \
- DRAM1_SIZE, \
+#define MAP_DRAM1_NS MAP_REGION_FLAT(DRAM1_NS_BASE, \
+ DRAM1_NS_SIZE, \
MT_MEMORY | MT_RW | MT_NS)
#define MAP_TSP_SEC_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \
@@ -94,7 +94,7 @@
MAP_FLASH0,
MAP_DEVICE0,
MAP_DEVICE1,
- MAP_DRAM1,
+ MAP_DRAM1_NS,
MAP_TSP_SEC_MEM,
{0}
};