Merge changes I2d140b32,Id59ae926,I31c71551 into integration
* changes:
feat(mt8189): add GPIO support
feat(mt8189): initialize platform for MT8189
refactor(mediatek): move headers to common folder
diff --git a/docs/plat/index.rst b/docs/plat/index.rst
index 0b53d1d..0ad9181 100644
--- a/docs/plat/index.rst
+++ b/docs/plat/index.rst
@@ -22,6 +22,7 @@
mt8183
mt8186
mt8188
+ mt8189
mt8192
mt8195
mt8196
diff --git a/docs/plat/mt8189.rst b/docs/plat/mt8189.rst
new file mode 100644
index 0000000..81aa129
--- /dev/null
+++ b/docs/plat/mt8189.rst
@@ -0,0 +1,22 @@
+MediaTek 8189
+=============
+
+MediaTek 8189 (MT8189) is a 64-bit ARM SoC introduced by MediaTek in 2024.
+The chip incorporates eight cores - six Cortex-A55 cores, two Cortex-A78
+cores.
+Cortex-A55 can operate at up to 2.0 GHz.
+Cortex-A78 can operate at up to 3.0 GHz.
+
+Boot Sequence
+-------------
+
+::
+
+ Boot Rom --> Coreboot --> TF-A BL31 --> Depthcharge --> Linux Kernel
+
+How to Build
+------------
+
+.. code:: shell
+
+ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=mt8189 DEBUG=1 COREBOOT=1
diff --git a/plat/mediatek/mt8196/include/plat_macros.S b/plat/mediatek/common/include/plat_macros.S
similarity index 93%
rename from plat/mediatek/mt8196/include/plat_macros.S
rename to plat/mediatek/common/include/plat_macros.S
index c646edd..b26be39 100644
--- a/plat/mediatek/mt8196/include/plat_macros.S
+++ b/plat/mediatek/common/include/plat_macros.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2024, Mediatek Inc. All rights reserved.
+ * Copyright (c) 2025, Mediatek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/mediatek/mt8196/include/plat_private.h b/plat/mediatek/common/include/plat_private.h
similarity index 88%
rename from plat/mediatek/mt8196/include/plat_private.h
rename to plat/mediatek/common/include/plat_private.h
index 1ed1973..9a0a6ae 100644
--- a/plat/mediatek/mt8196/include/plat_private.h
+++ b/plat/mediatek/common/include/plat_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2024, Mediatek Inc. All rights reserved.
+ * Copyright (c) 2025, Mediatek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/mediatek/mt8186/include/plat_macros.S b/plat/mediatek/mt8186/include/plat_macros.S
deleted file mode 100644
index 39727ea..0000000
--- a/plat/mediatek/mt8186/include/plat_macros.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef PLAT_MACROS_S
-#define PLAT_MACROS_S
-
-#include <platform_def.h>
-
-.section .rodata.gic_reg_name, "aS"
-gicc_regs:
- .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
-gicd_pend_reg:
- .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
- " Offset:\t\t\tvalue\n"
-newline:
- .asciz "\n"
-spacer:
- .asciz ":\t\t0x"
-
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ---------------------------------------------
- * The below macro prints out relevant GIC
- * registers whenever an unhandled exception
- * is taken in BL31.
- * Clobbers: x0 - x10, x26, x27, sp
- * ---------------------------------------------
- */
- .macro plat_crash_print_regs
- /* TODO: leave implementation to GIC owner */
- .endm
-
-#endif /* PLAT_MACROS_S */
diff --git a/plat/mediatek/mt8186/include/plat_private.h b/plat/mediatek/mt8186/include/plat_private.h
deleted file mode 100644
index 7ef2b85..0000000
--- a/plat/mediatek/mt8186/include/plat_private.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_PRIVATE_H
-#define PLAT_PRIVATE_H
-
-/*******************************************************************************
- * Function and variable prototypes
- ******************************************************************************/
-void plat_configure_mmu_el3(uintptr_t total_base,
- uintptr_t total_size,
- uintptr_t ro_start,
- uintptr_t ro_limit);
-
-#endif /* PLAT_PRIVATE_H */
diff --git a/plat/mediatek/mt8186/platform.mk b/plat/mediatek/mt8186/platform.mk
index 9c03340..3ac4b29 100644
--- a/plat/mediatek/mt8186/platform.mk
+++ b/plat/mediatek/mt8186/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021-2024, MediaTek Inc. All rights reserved.
+# Copyright (c) 2021-2025, MediaTek Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -11,6 +11,7 @@
TRNG_SUPPORT := 1
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
+ -I${MTK_PLAT}/common/include \
-I${MTK_PLAT}/drivers/cirq/ \
-I${MTK_PLAT}/drivers/gic600/ \
-I${MTK_PLAT}/drivers/gpio/ \
diff --git a/plat/mediatek/mt8188/include/plat_macros.S b/plat/mediatek/mt8188/include/plat_macros.S
deleted file mode 100644
index a6e05a9..0000000
--- a/plat/mediatek/mt8188/include/plat_macros.S
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_MACROS_S
-#define PLAT_MACROS_S
-
-#include <platform_def.h>
-
-.section .rodata.gic_reg_name, "aS"
-gicc_regs:
- .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
-gicd_pend_reg:
- .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
- " Offset:\t\t\tvalue\n"
-newline:
- .asciz "\n"
-spacer:
- .asciz ":\t\t0x"
-
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ---------------------------------------------
- * The below macro prints out relevant GIC
- * registers whenever an unhandled exception
- * is taken in BL31.
- * Clobbers: x0 - x10, x26, x27, sp
- * ---------------------------------------------
- */
- .macro plat_crash_print_regs
- /* TODO: leave implementation to GIC owner */
- .endm
-
-#endif /* PLAT_MACROS_S */
diff --git a/plat/mediatek/mt8188/include/plat_private.h b/plat/mediatek/mt8188/include/plat_private.h
deleted file mode 100644
index 4d4ac85..0000000
--- a/plat/mediatek/mt8188/include/plat_private.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_PRIVATE_H
-#define PLAT_PRIVATE_H
-
-/*******************************************************************************
- * Function and variable prototypes
- ******************************************************************************/
-void plat_configure_mmu_el3(uintptr_t total_base,
- uintptr_t total_size,
- uintptr_t ro_start,
- uintptr_t ro_limit);
-
-#endif /* PLAT_PRIVATE_H */
diff --git a/plat/mediatek/mt8188/platform.mk b/plat/mediatek/mt8188/platform.mk
index b776447..c57a6f5 100644
--- a/plat/mediatek/mt8188/platform.mk
+++ b/plat/mediatek/mt8188/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
+# Copyright (c) 2022-2025, MediaTek Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -13,6 +13,7 @@
include lib/xlat_tables_v2/xlat_tables.mk
PLAT_INCLUDES := -I${MTK_PLAT}/common \
+ -I${MTK_PLAT}/common/include \
-I${MTK_PLAT}/include \
-I${MTK_PLAT}/include/${ARCH_VERSION} \
-I${MTK_PLAT} \
diff --git a/plat/mediatek/mt8189/drivers/gpio/mtgpio.c b/plat/mediatek/mt8189/drivers/gpio/mtgpio.c
new file mode 100644
index 0000000..e81d132
--- /dev/null
+++ b/plat/mediatek/mt8189/drivers/gpio/mtgpio.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2025, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+
+#include <mtgpio.h>
+#include <platform_def.h>
+
+typedef enum {
+ REG_0 = 0,
+ REG_1,
+ REG_2,
+ REG_3,
+ REG_4,
+ REG_5,
+ REG_6,
+ REG_7,
+ REG_8
+} RegEnum;
+
+uintptr_t mt_gpio_find_reg_addr(uint32_t pin)
+{
+ uintptr_t reg_addr = 0U;
+ struct mt_pin_info gpio_info;
+
+ assert(pin < MAX_GPIO_PIN);
+
+ gpio_info = mt_pin_infos[pin];
+
+ switch (gpio_info.base & 0xF) {
+ case REG_0:
+ reg_addr = IOCFG_LM_BASE;
+ break;
+ case REG_1:
+ reg_addr = IOCFG_RB0_BASE;
+ break;
+ case REG_2:
+ reg_addr = IOCFG_RB1_BASE;
+ break;
+ case REG_3:
+ reg_addr = IOCFG_BM0_BASE;
+ break;
+ case REG_4:
+ reg_addr = IOCFG_BM1_BASE;
+ break;
+ case REG_5:
+ reg_addr = IOCFG_BM2_BASE;
+ break;
+ case REG_6:
+ reg_addr = IOCFG_LT0_BASE;
+ break;
+ case REG_7:
+ reg_addr = IOCFG_LT1_BASE;
+ break;
+ case REG_8:
+ reg_addr = IOCFG_RT_BASE;
+ break;
+ default:
+ break;
+ }
+
+ return reg_addr;
+}
diff --git a/plat/mediatek/mt8189/drivers/gpio/mtgpio.h b/plat/mediatek/mt8189/drivers/gpio/mtgpio.h
new file mode 100644
index 0000000..cf461e1
--- /dev/null
+++ b/plat/mediatek/mt8189/drivers/gpio/mtgpio.h
@@ -0,0 +1,227 @@
+/*
+ * Copyright (c) 2025, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MT_GPIO_H
+#define MT_GPIO_H
+
+#include <mtgpio_common.h>
+
+/* Enumeration for GPIO pin */
+typedef enum GPIO_PIN {
+ GPIO_UNSUPPORTED = -1,
+ GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6,
+ GPIO7, GPIO8, GPIO9, GPIO10, GPIO11, GPIO12, GPIO13, GPIO14,
+ GPIO15, GPIO16, GPIO17, GPIO18, GPIO19, GPIO20, GPIO21, GPIO22,
+ GPIO23, GPIO24, GPIO25, GPIO26, GPIO27, GPIO28, GPIO29, GPIO30,
+ GPIO31, GPIO32, GPIO33, GPIO34, GPIO35, GPIO36, GPIO37, GPIO38,
+ GPIO39, GPIO40, GPIO41, GPIO42, GPIO43, GPIO44, GPIO45, GPIO46,
+ GPIO47, GPIO48, GPIO49, GPIO50, GPIO51, GPIO52, GPIO53, GPIO54,
+ GPIO55, GPIO56, GPIO57, GPIO58, GPIO59, GPIO60, GPIO61, GPIO62,
+ GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70,
+ GPIO71, GPIO72, GPIO73, GPIO74, GPIO75, GPIO76, GPIO77, GPIO78,
+ GPIO79, GPIO80, GPIO81, GPIO82, GPIO83, GPIO84, GPIO85, GPIO86,
+ GPIO87, GPIO88, GPIO89, GPIO90, GPIO91, GPIO92, GPIO93, GPIO94,
+ GPIO95, GPIO96, GPIO97, GPIO98, GPIO99, GPIO100, GPIO101, GPIO102,
+ GPIO103, GPIO104, GPIO105, GPIO106, GPIO107, GPIO108, GPIO109, GPIO110,
+ GPIO111, GPIO112, GPIO113, GPIO114, GPIO115, GPIO116, GPIO117, GPIO118,
+ GPIO119, GPIO120, GPIO121, GPIO122, GPIO123, GPIO124, GPIO125, GPIO126,
+ GPIO127, GPIO128, GPIO129, GPIO130, GPIO131, GPIO132, GPIO133, GPIO134,
+ GPIO135, GPIO136, GPIO137, GPIO138, GPIO139, GPIO140, GPIO141, GPIO142,
+ GPIO143, GPIO144, GPIO145, GPIO146, GPIO147, GPIO148, GPIO149, GPIO150,
+ GPIO151, GPIO152, GPIO153, GPIO154, GPIO155, GPIO156, GPIO157, GPIO158,
+ GPIO159, GPIO160, GPIO161, GPIO162, GPIO163, GPIO164, GPIO165, GPIO166,
+ GPIO167, GPIO168, GPIO169, GPIO170, GPIO171, GPIO172, GPIO173, GPIO174,
+ GPIO175, GPIO176, GPIO177, GPIO178, GPIO179, GPIO180, GPIO181, GPIO182,
+ MT_GPIO_BASE_MAX
+} GPIO_PIN;
+
+static const struct mt_pin_info mt_pin_infos[] = {
+ PIN(0, 0, 5, 0x21, 0xa0),
+ PIN(1, 0, 3, 0x12, 0x90),
+ PIN(2, 0, 4, 0x12, 0x90),
+ PIN(3, 0, 5, 0x12, 0x90),
+ PIN(4, 0, 6, 0x12, 0x90),
+ PIN(5, 0, 7, 0x12, 0x90),
+ PIN(6, 0, 6, 0x21, 0xa0),
+ PIN(7, 0, 7, 0x21, 0xa0),
+ PIN(8, 0, 8, 0x21, 0xa0),
+ PIN(9, 0, 9, 0x21, 0xa0),
+ PIN(10, 0, 10, 0x21, 0xa0),
+ PIN(11, 0, 11, 0x21, 0xa0),
+ PIN(12, 0, 5, 0x14, 0xb0),
+ PIN(13, 0, 6, 0x14, 0xb0),
+ PIN(14, 0, 0, 0x25, 0xa0),
+ PIN(15, 0, 1, 0x25, 0xa0),
+ PIN(16, 0, 7, 0x14, 0xb0),
+ PIN(17, 0, 8, 0x14, 0xb0),
+ PIN(18, 0, 0, 0x21, 0xa0),
+ PIN(19, 0, 2, 0x21, 0xa0),
+ PIN(20, 0, 1, 0x21, 0xa0),
+ PIN(21, 0, 3, 0x21, 0xa0),
+ PIN(22, 0, 0, 0x28, 0x90),
+ PIN(23, 0, 1, 0x28, 0x90),
+ PIN(24, 0, 2, 0x28, 0x90),
+ PIN(25, 0, 2, 0x10, 0x90),
+ PIN(26, 0, 1, 0x10, 0x90),
+ PIN(27, 0, 1, 0x14, 0xb0),
+ PIN(28, 0, 2, 0x14, 0xb0),
+ PIN(29, 0, 0, 0x10, 0x90),
+ PIN(30, 0, 0, 0x14, 0xb0),
+ PIN(31, 0, 13, 0x25, 0xa0),
+ PIN(32, 0, 30, 0x13, 0x90),
+ PIN(33, 0, 15, 0x25, 0xa0),
+ PIN(34, 0, 14, 0x25, 0xa0),
+ PIN(35, 0, 17, 0x25, 0xa0),
+ PIN(36, 0, 16, 0x25, 0xa0),
+ PIN(37, 0, 19, 0x25, 0xa0),
+ PIN(38, 0, 18, 0x25, 0xa0),
+ PIN(39, 0, 5, 0x25, 0xa0),
+ PIN(40, 0, 2, 0x25, 0xa0),
+ PIN(41, 0, 3, 0x25, 0xa0),
+ PIN(42, 0, 4, 0x25, 0xa0),
+ PIN(43, 0, 6, 0x25, 0xa0),
+ PIN(44, 1, 0, 0x21, 0x90),
+ PIN(45, 1, 1, 0x21, 0x90),
+ PIN(46, 1, 2, 0x21, 0x90),
+ PIN(47, 1, 3, 0x21, 0x90),
+ PIN(48, 0, 5, 0x10, 0x90),
+ PIN(49, 0, 4, 0x10, 0x90),
+ PIN(50, 0, 3, 0x10, 0x90),
+ PIN(51, 0, 8, 0x12, 0x90),
+ PIN(52, 0, 10, 0x12, 0x90),
+ PIN(53, 0, 9, 0x12, 0x90),
+ PIN(54, 0, 11, 0x12, 0x90),
+ PIN(55, 0, 6, 0x10, 0x90),
+ PIN(56, 0, 7, 0x10, 0x90),
+ PIN(57, 0, 13, 0x14, 0xb0),
+ PIN(58, 0, 17, 0x14, 0xb0),
+ PIN(59, 0, 14, 0x14, 0xb0),
+ PIN(60, 0, 18, 0x14, 0xb0),
+ PIN(61, 0, 15, 0x14, 0xb0),
+ PIN(62, 0, 19, 0x14, 0xb0),
+ PIN(63, 0, 16, 0x14, 0xb0),
+ PIN(64, 0, 20, 0x14, 0xb0),
+ PIN(65, 0, 4, 0x28, 0x90),
+ PIN(66, 0, 6, 0x28, 0x90),
+ PIN(67, 0, 5, 0x28, 0x90),
+ PIN(68, 0, 7, 0x28, 0x90),
+ PIN(69, 0, 22, 0x14, 0xb0),
+ PIN(70, 0, 21, 0x14, 0xb0),
+ PIN(71, 0, 24, 0x14, 0xb0),
+ PIN(72, 0, 23, 0x14, 0xb0),
+ PIN(73, 0, 26, 0x14, 0xb0),
+ PIN(74, 0, 25, 0x14, 0xb0),
+ PIN(75, 0, 7, 0x25, 0xa0),
+ PIN(76, 0, 27, 0x14, 0xb0),
+ PIN(77, 0, 13, 0x12, 0x90),
+ PIN(78, 0, 12, 0x12, 0x90),
+ PIN(79, 0, 15, 0x12, 0x90),
+ PIN(80, 0, 14, 0x12, 0x90),
+ PIN(81, 0, 29, 0x14, 0xb0),
+ PIN(82, 0, 28, 0x14, 0xb0),
+ PIN(83, 0, 30, 0x14, 0xb0),
+ PIN(84, 0, 22, 0x21, 0xa0),
+ PIN(85, 0, 23, 0x21, 0xa0),
+ PIN(86, 0, 24, 0x21, 0xa0),
+ PIN(87, 0, 25, 0x21, 0xa0),
+ PIN(88, 0, 11, 0x26, 0xb0),
+ PIN(89, 0, 10, 0x26, 0xb0),
+ PIN(90, 0, 13, 0x26, 0xb0),
+ PIN(91, 0, 12, 0x26, 0xb0),
+ PIN(92, 0, 7, 0x26, 0xb0),
+ PIN(93, 0, 8, 0x26, 0xb0),
+ PIN(94, 0, 14, 0x26, 0xb0),
+ PIN(95, 0, 6, 0x26, 0xb0),
+ PIN(96, 0, 9, 0x26, 0xb0),
+ PIN(97, 0, 0, 0x26, 0xb0),
+ PIN(98, 0, 5, 0x26, 0xb0),
+ PIN(99, 0, 3, 0x26, 0xb0),
+ PIN(100, 0, 4, 0x26, 0xb0),
+ PIN(101, 0, 1, 0x26, 0xb0),
+ PIN(102, 0, 2, 0x26, 0xb0),
+ PIN(103, 0, 15, 0x21, 0xa0),
+ PIN(104, 0, 12, 0x21, 0xa0),
+ PIN(105, 0, 14, 0x21, 0xa0),
+ PIN(106, 0, 13, 0x21, 0xa0),
+ PIN(107, 0, 19, 0x21, 0xa0),
+ PIN(108, 0, 16, 0x21, 0xa0),
+ PIN(109, 0, 18, 0x21, 0xa0),
+ PIN(110, 0, 17, 0x21, 0xa0),
+ PIN(111, 0, 4, 0x21, 0xa0),
+ PIN(112, 0, 0, 0x12, 0x90),
+ PIN(113, 0, 1, 0x12, 0x90),
+ PIN(114, 0, 2, 0x12, 0x90),
+ PIN(115, 0, 9, 0x14, 0xb0),
+ PIN(116, 0, 12, 0x14, 0xb0),
+ PIN(117, 0, 10, 0x14, 0xb0),
+ PIN(118, 0, 11, 0x14, 0xb0),
+ PIN(119, 0, 26, 0x13, 0x90),
+ PIN(120, 0, 25, 0x13, 0x90),
+ PIN(121, 0, 24, 0x13, 0x90),
+ PIN(122, 0, 23, 0x13, 0x90),
+ PIN(123, 0, 19, 0x13, 0x90),
+ PIN(124, 0, 18, 0x13, 0x90),
+ PIN(125, 0, 17, 0x13, 0x90),
+ PIN(126, 0, 16, 0x13, 0x90),
+ PIN(127, 0, 22, 0x13, 0x90),
+ PIN(128, 0, 15, 0x13, 0x90),
+ PIN(129, 0, 20, 0x13, 0x90),
+ PIN(130, 0, 27, 0x13, 0x90),
+ PIN(131, 0, 13, 0x13, 0x90),
+ PIN(132, 0, 14, 0x13, 0x90),
+ PIN(133, 0, 28, 0x13, 0x90),
+ PIN(134, 0, 21, 0x13, 0x90),
+ PIN(135, 0, 11, 0x13, 0x90),
+ PIN(136, 0, 12, 0x13, 0x90),
+ PIN(137, 0, 3, 0x14, 0xb0),
+ PIN(138, 0, 4, 0x14, 0xb0),
+ PIN(139, 0, 3, 0x13, 0x90),
+ PIN(140, 0, 4, 0x13, 0x90),
+ PIN(141, 0, 0, 0x13, 0x90),
+ PIN(142, 0, 1, 0x13, 0x90),
+ PIN(143, 0, 2, 0x13, 0x90),
+ PIN(144, 0, 5, 0x13, 0x90),
+ PIN(145, 0, 6, 0x13, 0x90),
+ PIN(146, 0, 7, 0x13, 0x90),
+ PIN(147, 0, 8, 0x13, 0x90),
+ PIN(148, 0, 9, 0x13, 0x90),
+ PIN(149, 0, 10, 0x13, 0x90),
+ PIN(150, 0, 8, 0x25, 0xa0),
+ PIN(151, 0, 29, 0x13, 0x90),
+ PIN(152, 0, 9, 0x25, 0xa0),
+ PIN(153, 0, 10, 0x25, 0xa0),
+ PIN(154, 0, 11, 0x25, 0xa0),
+ PIN(155, 0, 12, 0x25, 0xa0),
+ PIN(156, 1, 6, 0x26, 0xa0),
+ PIN(157, 1, 5, 0x26, 0xa0),
+ PIN(158, 1, 4, 0x26, 0xa0),
+ PIN(159, 1, 2, 0x17, 0x50),
+ PIN(160, 1, 8, 0x26, 0xa0),
+ PIN(161, 1, 1, 0x26, 0xa0),
+ PIN(162, 1, 0, 0x26, 0xa0),
+ PIN(163, 1, 1, 0x17, 0x50),
+ PIN(164, 1, 3, 0x26, 0xa0),
+ PIN(165, 1, 2, 0x26, 0xa0),
+ PIN(166, 1, 0, 0x17, 0x50),
+ PIN(167, 1, 7, 0x26, 0xa0),
+ PIN(168, 1, 1, 0x25, 0x90),
+ PIN(169, 1, 0, 0x25, 0x90),
+ PIN(170, 1, 2, 0x25, 0x90),
+ PIN(171, 1, 3, 0x25, 0x90),
+ PIN(172, 1, 4, 0x25, 0x90),
+ PIN(173, 1, 5, 0x25, 0x90),
+ PIN(174, 1, 1, 0x28, 0x80),
+ PIN(175, 1, 0, 0x28, 0x80),
+ PIN(176, 1, 2, 0x28, 0x80),
+ PIN(177, 1, 3, 0x28, 0x80),
+ PIN(178, 1, 4, 0x28, 0x80),
+ PIN(179, 1, 5, 0x28, 0x80),
+ PIN(180, 0, 15, 0x26, 0xb0),
+ PIN(181, 0, 16, 0x26, 0xb0),
+ PIN(182, 0, 3, 0x28, 0x90),
+};
+
+#endif /* MT_GPIO_H */
diff --git a/plat/mediatek/mt8189/include/platform_def.h b/plat/mediatek/mt8189/include/platform_def.h
new file mode 100644
index 0000000..66bec16
--- /dev/null
+++ b/plat/mediatek/mt8189/include/platform_def.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2025, Mediatek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
+
+#include <arch_def.h>
+
+#define PLAT_PRIMARY_CPU (0x0)
+
+#define MT_GIC_BASE (0x0C000000)
+#define MCUCFG_BASE (0x0C530000)
+#define MCUCFG_REG_SIZE (0x10000)
+#define IO_PHYS (0x10000000)
+
+/* Aggregate of all devices for MMU mapping */
+#define MTK_DEV_RNG0_BASE (MT_GIC_BASE)
+#define MTK_DEV_RNG0_SIZE (0x600000)
+#define MTK_DEV_RNG1_BASE (IO_PHYS)
+#define MTK_DEV_RNG1_SIZE (0x10000000)
+
+#define TOPCKGEN_BASE (IO_PHYS)
+
+/*******************************************************************************
+ * GPIO related constants
+ ******************************************************************************/
+#define GPIO_BASE (IO_PHYS + 0x00005000)
+#define IOCFG_LM_BASE (IO_PHYS + 0x01B50000)
+#define IOCFG_RB0_BASE (IO_PHYS + 0x01C50000)
+#define IOCFG_RB1_BASE (IO_PHYS + 0x01C60000)
+#define IOCFG_BM0_BASE (IO_PHYS + 0x01D20000)
+#define IOCFG_BM1_BASE (IO_PHYS + 0x01D30000)
+#define IOCFG_BM2_BASE (IO_PHYS + 0x01D40000)
+#define IOCFG_LT0_BASE (IO_PHYS + 0x01E20000)
+#define IOCFG_LT1_BASE (IO_PHYS + 0x01E30000)
+#define IOCFG_RT_BASE (IO_PHYS + 0x01F20000)
+
+/*******************************************************************************
+ * UART related constants
+ ******************************************************************************/
+#define UART0_BASE (IO_PHYS + 0x01002000)
+#define UART_BAUDRATE (115200)
+
+/*******************************************************************************
+ * System counter frequency related constants
+ ******************************************************************************/
+#define SYS_COUNTER_FREQ_IN_HZ (13000000)
+#define SYS_COUNTER_FREQ_IN_MHZ (13)
+
+/*******************************************************************************
+ * Platform binary types for linking
+ ******************************************************************************/
+#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
+#define PLATFORM_LINKER_ARCH aarch64
+
+/*******************************************************************************
+ * Generic platform constants
+ ******************************************************************************/
+#define PLATFORM_STACK_SIZE (0x800)
+#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
+#define SOC_CHIP_ID U(0x8189)
+
+/*******************************************************************************
+ * Platform memory map related constants
+ ******************************************************************************/
+#define TZRAM_BASE (0x54600000)
+#define TZRAM_SIZE (0x00200000)
+
+/*******************************************************************************
+ * BL31 specific defines.
+ ******************************************************************************/
+/*
+ * Put BL3-1 at the top of the Trusted SRAM (just below the shared memory, if
+ * present). BL31_BASE is calculated using the current BL3-1 debug size plus a
+ * little space for growth.
+ */
+#define BL31_BASE (TZRAM_BASE + 0x1000)
+#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
+
+/*******************************************************************************
+ * Platform specific page table and MMU setup constants
+ ******************************************************************************/
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
+#define MAX_XLAT_TABLES (16)
+#define MAX_MMAP_REGIONS (16)
+
+/*******************************************************************************
+ * SYSTIMER related definitions
+ ******************************************************************************/
+#define SYSTIMER_BASE (IO_PHYS + 0x0CC10000)
+
+#endif /* PLATFORM_DEF_H */
diff --git a/plat/mediatek/mt8189/plat_config.mk b/plat/mediatek/mt8189/plat_config.mk
new file mode 100644
index 0000000..6b4064a
--- /dev/null
+++ b/plat/mediatek/mt8189/plat_config.mk
@@ -0,0 +1,38 @@
+#
+# Copyright (c) 2025, MediaTek Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+# Separate text code and read only data
+SEPARATE_CODE_AND_RODATA := 1
+
+# ARMv8.2 and above need enable HW assist coherence
+HW_ASSISTED_COHERENCY := 1
+
+# No need coherency memory because of HW assistency
+USE_COHERENT_MEM := 0
+
+# GIC600
+GICV3_SUPPORT_GIC600 := 1
+
+#
+# MTK options
+#
+MCUSYS_VERSION := v1
+PLAT_EXTRA_RODATA_INCLUDES := 1
+
+# Configs for A78 and A55
+CTX_INCLUDE_AARCH32_REGS := 0
+ERRATA_A55_1530923 := 1
+ERRATA_A55_1221012 := 1
+ERRATA_A78_1688305 := 1
+ERRATA_A78_1941498 := 1
+ERRATA_A78_1951500 := 1
+ERRATA_A78_1821534 := 1
+ERRATA_A78_2132060 := 1
+ERRATA_A78_2242635 := 1
+ERRATA_A78_2376745 := 1
+ERRATA_A78_2395406 := 1
+
+CONFIG_ARCH_ARM_V8_2 := y
diff --git a/plat/mediatek/mt8189/plat_mmap.c b/plat/mediatek/mt8189/plat_mmap.c
new file mode 100644
index 0000000..199abf7
--- /dev/null
+++ b/plat/mediatek/mt8189/plat_mmap.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2025, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdint.h>
+
+#include <mtk_mmap_pool.h>
+#include <platform_def.h>
+
+static const mmap_region_t plat_mmap[] = {
+ MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
+ MT_DEVICE | MT_RW | MT_SECURE),
+ MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE,
+ MT_DEVICE | MT_RW | MT_SECURE),
+ { 0 }
+};
+DECLARE_MTK_MMAP_REGIONS(plat_mmap);
diff --git a/plat/mediatek/mt8189/platform.mk b/plat/mediatek/mt8189/platform.mk
new file mode 100644
index 0000000..31a5ed5
--- /dev/null
+++ b/plat/mediatek/mt8189/platform.mk
@@ -0,0 +1,55 @@
+#
+# Copyright (c) 2025, MediaTek Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+MTK_PLAT := plat/mediatek
+MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
+MTK_SOC := ${PLAT}
+
+include plat/mediatek/build_helpers/mtk_build_helpers.mk
+include drivers/arm/gic/v3/gicv3.mk
+include lib/xlat_tables_v2/xlat_tables.mk
+
+PLAT_INCLUDES := -I${MTK_PLAT}/common \
+ -I${MTK_PLAT}/common/include \
+ -I${MTK_PLAT}/drivers/gpio/ \
+ -I${MTK_PLAT}/include \
+ -I${MTK_PLAT}/include/${ARCH_VERSION} \
+ -I${MTK_PLAT} \
+ -I${MTK_PLAT_SOC}/drivers/gpio/ \
+ -I${MTK_PLAT_SOC}/include \
+ -Idrivers/arm/gic \
+
+MODULES-y += $(MTK_PLAT)/common
+MODULES-y += $(MTK_PLAT)/helpers
+MODULES-y += $(MTK_PLAT)/lib/mtk_init
+MODULES-y += $(MTK_PLAT)/lib/pm
+MODULES-y += $(MTK_PLAT)/topology
+MODULES-y += $(MTK_PLAT)/drivers/mcusys
+MODULES-y += $(MTK_PLAT)/drivers/timer
+
+PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
+ drivers/ti/uart/aarch64/16550_console.S \
+ lib/bl_aux_params/bl_aux_params.c
+
+BL31_SOURCES += drivers/delay_timer/delay_timer.c \
+ drivers/delay_timer/generic_delay_timer.c \
+ drivers/gpio/gpio.c \
+ lib/cpus/aarch64/cortex_a55.S \
+ lib/cpus/aarch64/cortex_a78.S \
+ ${GICV3_SOURCES} \
+ ${XLAT_TABLES_LIB_SRCS} \
+ plat/common/plat_gicv3.c \
+ plat/common/plat_psci_common.c \
+ plat/common/aarch64/crash_console_helpers.S \
+ ${MTK_PLAT}/common/mtk_plat_common.c \
+ ${MTK_PLAT}/common/params_setup.c \
+ ${MTK_PLAT}/drivers/gpio/mtgpio_common.c \
+ $(MTK_PLAT)/$(MTK_SOC)/drivers/gpio/mtgpio.c \
+ $(MTK_PLAT)/$(MTK_SOC)/plat_mmap.c
+
+include plat/mediatek/build_helpers/mtk_build_helpers_epilogue.mk
+
+include lib/coreboot/coreboot.mk
diff --git a/plat/mediatek/mt8192/include/plat_macros.S b/plat/mediatek/mt8192/include/plat_macros.S
deleted file mode 100644
index 7d17e36..0000000
--- a/plat/mediatek/mt8192/include/plat_macros.S
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef PLAT_MACROS_S
-#define PLAT_MACROS_S
-
-#include <platform_def.h>
-
-.section .rodata.gic_reg_name, "aS"
-gicc_regs:
- .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
-gicd_pend_reg:
- .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
- " Offset:\t\t\tvalue\n"
-newline:
- .asciz "\n"
-spacer:
- .asciz ":\t\t0x"
-
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ---------------------------------------------
- * The below macro prints out relevant GIC
- * registers whenever an unhandled exception
- * is taken in BL31.
- * Clobbers: x0 - x10, x26, x27, sp
- * ---------------------------------------------
- */
- .macro plat_crash_print_regs
- /* To-do: GIC owner */
- /* To-do: CCI owner */
- .endm
-
-#endif /* PLAT_MACROS_S */
diff --git a/plat/mediatek/mt8192/include/plat_private.h b/plat/mediatek/mt8192/include/plat_private.h
deleted file mode 100644
index 42ca415..0000000
--- a/plat/mediatek/mt8192/include/plat_private.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_PRIVATE_H
-#define PLAT_PRIVATE_H
-
-/*******************************************************************************
- * Function and variable prototypes
- ******************************************************************************/
-void plat_configure_mmu_el3(uintptr_t total_base,
- uintptr_t total_size,
- uintptr_t ro_start,
- uintptr_t ro_limit);
-
-#endif /* PLAT_PRIVATE_H */
diff --git a/plat/mediatek/mt8192/platform.mk b/plat/mediatek/mt8192/platform.mk
index 4afd157..45ffd39 100644
--- a/plat/mediatek/mt8192/platform.mk
+++ b/plat/mediatek/mt8192/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2020-2023, MediaTek Inc. All rights reserved.
+# Copyright (c) 2020-2025, MediaTek Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -8,6 +8,7 @@
MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
+ -I${MTK_PLAT}/common/include \
-I${MTK_PLAT}/drivers/cirq/ \
-I${MTK_PLAT}/drivers/gic600/ \
-I${MTK_PLAT}/drivers/gpio/ \
diff --git a/plat/mediatek/mt8195/include/plat_macros.S b/plat/mediatek/mt8195/include/plat_macros.S
deleted file mode 100644
index 39727ea..0000000
--- a/plat/mediatek/mt8195/include/plat_macros.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef PLAT_MACROS_S
-#define PLAT_MACROS_S
-
-#include <platform_def.h>
-
-.section .rodata.gic_reg_name, "aS"
-gicc_regs:
- .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
-gicd_pend_reg:
- .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
- " Offset:\t\t\tvalue\n"
-newline:
- .asciz "\n"
-spacer:
- .asciz ":\t\t0x"
-
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ---------------------------------------------
- * The below macro prints out relevant GIC
- * registers whenever an unhandled exception
- * is taken in BL31.
- * Clobbers: x0 - x10, x26, x27, sp
- * ---------------------------------------------
- */
- .macro plat_crash_print_regs
- /* TODO: leave implementation to GIC owner */
- .endm
-
-#endif /* PLAT_MACROS_S */
diff --git a/plat/mediatek/mt8195/include/plat_private.h b/plat/mediatek/mt8195/include/plat_private.h
deleted file mode 100644
index 7ef2b85..0000000
--- a/plat/mediatek/mt8195/include/plat_private.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_PRIVATE_H
-#define PLAT_PRIVATE_H
-
-/*******************************************************************************
- * Function and variable prototypes
- ******************************************************************************/
-void plat_configure_mmu_el3(uintptr_t total_base,
- uintptr_t total_size,
- uintptr_t ro_start,
- uintptr_t ro_limit);
-
-#endif /* PLAT_PRIVATE_H */
diff --git a/plat/mediatek/mt8195/platform.mk b/plat/mediatek/mt8195/platform.mk
index e604d4f..e7a5a1a 100644
--- a/plat/mediatek/mt8195/platform.mk
+++ b/plat/mediatek/mt8195/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021-2023, MediaTek Inc. All rights reserved.
+# Copyright (c) 2021-2025, MediaTek Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -8,6 +8,7 @@
MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
+ -I${MTK_PLAT}/common/include \
-I${MTK_PLAT}/drivers/cirq/ \
-I${MTK_PLAT}/drivers/dp/ \
-I${MTK_PLAT}/drivers/gic600/ \
diff --git a/plat/mediatek/mt8196/platform.mk b/plat/mediatek/mt8196/platform.mk
index 36048fe..172a074 100644
--- a/plat/mediatek/mt8196/platform.mk
+++ b/plat/mediatek/mt8196/platform.mk
@@ -27,6 +27,7 @@
include lib/xlat_tables_v2/xlat_tables.mk
PLAT_INCLUDES := -I${MTK_PLAT}/common \
+ -I${MTK_PLAT}/common/include \
-I${MTK_PLAT}/drivers/cpu_pm/topology/inc \
-I${MTK_PLAT}/drivers/gpio/ \
-I${MTK_PLAT}/include \