diff --git a/include/lib/runtime_instr.h b/include/lib/runtime_instr.h
index d409002..4d05ba4 100644
--- a/include/lib/runtime_instr.h
+++ b/include/lib/runtime_instr.h
@@ -31,11 +31,13 @@
 #ifndef __RUNTIME_INSTR_H__
 #define __RUNTIME_INSTR_H__
 
-#define RT_INSTR_TOTAL_IDS		4
 #define RT_INSTR_ENTER_PSCI		0
 #define RT_INSTR_EXIT_PSCI		1
 #define RT_INSTR_ENTER_HW_LOW_PWR	2
 #define RT_INSTR_EXIT_HW_LOW_PWR	3
+#define RT_INSTR_ENTER_CFLUSH		4
+#define RT_INSTR_EXIT_CFLUSH		5
+#define RT_INSTR_TOTAL_IDS		6
 
 #ifndef __ASSEMBLY__
 PMF_DECLARE_CAPTURE_TIMESTAMP(rt_instr_svc)
diff --git a/lib/psci/psci_off.c b/lib/psci/psci_off.c
index 1cc6ede..897bf31 100644
--- a/lib/psci/psci_off.c
+++ b/lib/psci/psci_off.c
@@ -107,12 +107,29 @@
 	psci_stats_update_pwr_down(end_pwrlvl, &state_info);
 #endif
 
+#if ENABLE_RUNTIME_INSTRUMENTATION
+
+	/*
+	 * Flush cache line so that even if CPU power down happens
+	 * the timestamp update is reflected in memory.
+	 */
+	PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
+		RT_INSTR_ENTER_CFLUSH,
+		PMF_CACHE_MAINT);
+#endif
+
 	/*
 	 * Arch. management. Perform the necessary steps to flush all
 	 * cpu caches.
 	 */
 	psci_do_pwrdown_cache_maintenance(psci_find_max_off_lvl(&state_info));
 
+#if ENABLE_RUNTIME_INSTRUMENTATION
+	PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
+		RT_INSTR_EXIT_CFLUSH,
+		PMF_NO_CACHE_MAINT);
+#endif
+
 	/*
 	 * Plat. management: Perform platform specific actions to turn this
 	 * cpu off e.g. exit cpu coherency, program the power controller etc.
diff --git a/lib/psci/psci_suspend.c b/lib/psci/psci_suspend.c
index 10d2481..dc2ab77 100644
--- a/lib/psci/psci_suspend.c
+++ b/lib/psci/psci_suspend.c
@@ -109,6 +109,17 @@
 	 */
 	cm_init_my_context(ep);
 
+#if ENABLE_RUNTIME_INSTRUMENTATION
+
+	/*
+	 * Flush cache line so that even if CPU power down happens
+	 * the timestamp update is reflected in memory.
+	 */
+	PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
+		RT_INSTR_ENTER_CFLUSH,
+		PMF_CACHE_MAINT);
+#endif
+
 	/*
 	 * Arch. management. Perform the necessary steps to flush all
 	 * cpu caches. Currently we assume that the power level correspond
@@ -117,6 +128,12 @@
 	 * and the cpu-ops power down to perform from the platform.
 	 */
 	psci_do_pwrdown_cache_maintenance(max_off_lvl);
+
+#if ENABLE_RUNTIME_INSTRUMENTATION
+	PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
+		RT_INSTR_EXIT_CFLUSH,
+		PMF_NO_CACHE_MAINT);
+#endif
 }
 
 /*******************************************************************************