tree b39ce5dd2a5354f62c727db7e30b6432bad42132
parent ef63f5be6d6eca738b86058a1ae40da215d6b954
author Sona Mathew <SonaRebecca.Mathew@arm.com> 1678830636 -0500
committer Sona Mathew <SonaRebecca.Mathew@arm.com> 1683310990 -0500

fix(cpus): workaround platforms non-arm interconnect

The workarounds for these below mentioned errata are not implemented
in EL3, but the flags can be enabled/disabled at a platform level
based on arm/non-arm interconnect IP. The ABI helps assist the Kernel
in the process of mitigation for the following errata:

Cortex-A715:   erratum 2701951
Neoverse V2:   erratum 2719103
Cortex-A710:   erratum 2701952
Cortex-X2:     erratum 2701952
Neoverse N2:   erratum 2728475
Neoverse V1:   erratum 2701953
Cortex-A78:    erratum 2712571
Cortex-A78AE:  erratum 2712574
Cortex-A78C:   erratum 2712575

EL3 provides an appropriate return value via errata ABI when the
kernel makes an SMC call using the EM_CPU_ERRATUM_FEATURES FID with the
appropriate erratum ID.

Change-Id: I35bd69d812dba37410dd8bc2bbde20d4955b0850
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>