| commit | ccd580c453d5bf6daa114feca108e295e02a62eb | [log] [tgz] |
|---|---|---|
| author | Manish V Badarkhe <manish.badarkhe@arm.com> | Mon Sep 16 10:34:52 2024 +0200 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Mon Sep 16 10:34:52 2024 +0200 |
| tree | 832fcc362b3c8067f4a0dceb7bda32dc7193d6f1 | |
| parent | 056b4154ae946a594d8410922f2b07df237543f2 [diff] | |
| parent | ae84525f44ddfe8abd66644475899fdc19893481 [diff] |
Merge changes I09ab0a5c,I87d0a492,I613a52ae,I2fcd8d32,Ie91527a7, ... into integration * changes: feat(stm32mp2): manage DDR FW via FIP feat(stm32mp2): introduce DDR type compilation flags feat(stm32mp2): add RISAB registers description feat(stm32mp2-fdts): add BL31 info in fw-config feat(stm32mp2): add minimal support for BL31 feat(st): manage BL31 FCONF load_info struct