feat(qemu): make coherent memory section optional
Since CPUs such as cortex-a76 are hardware-assisted coherent, coherent
memory section is not required for them and should be an optional
section.
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Change-Id: I03c8e9148ca1780b8af92024359698f4452f7129
diff --git a/plat/qemu/common/qemu_bl2_setup.c b/plat/qemu/common/qemu_bl2_setup.c
index 8f6066b..c4d235e 100644
--- a/plat/qemu/common/qemu_bl2_setup.c
+++ b/plat/qemu/common/qemu_bl2_setup.c
@@ -38,11 +38,13 @@
- BL_RO_DATA_BASE, \
MT_RO_DATA | MT_SECURE)
+#if USE_COHERENT_MEM
#define MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \
BL_COHERENT_RAM_BASE, \
BL_COHERENT_RAM_END \
- BL_COHERENT_RAM_BASE, \
MT_DEVICE | MT_RW | MT_SECURE)
+#endif
/* Data structure which holds the extents of the trusted SRAM for BL2 */
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
@@ -108,7 +110,9 @@
const mmap_region_t bl_regions[] = {
MAP_BL2_TOTAL,
MAP_BL2_RO,
+#if USE_COHERENT_MEM
MAP_BL_COHERENT_RAM,
+#endif
{0}
};