diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index c7bc39f..2477954 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -202,6 +202,9 @@
 		mmio_clrbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST);
 	}
 
+	/* Disable MCKPROT */
+	mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT);
+
 	generic_delay_timer_init();
 
 	if (stm32mp1_clk_probe() < 0) {
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index f0dc575..1c897bd 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -183,6 +183,7 @@
 #define STM32MP1_TZC_BASE		U(0x5C006000)
 
 #define STM32MP1_TZC_A7_ID		U(0)
+#define STM32MP1_TZC_M4_ID		U(1)
 #define STM32MP1_TZC_LCD_ID		U(3)
 #define STM32MP1_TZC_GPU_ID		U(4)
 #define STM32MP1_TZC_MDMA_ID		U(5)
diff --git a/plat/st/stm32mp1/stm32mp1_security.c b/plat/st/stm32mp1/stm32mp1_security.c
index ebf1587..0ad43e4 100644
--- a/plat/st/stm32mp1/stm32mp1_security.c
+++ b/plat/st/stm32mp1/stm32mp1_security.c
@@ -41,6 +41,7 @@
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_GPU_ID) |
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) |
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) |
+			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_M4_ID) |
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) |
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) |
 			TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) |