tree 4f9e9bb6febca19e95b55f4b9b03caca5520a15a
parent 4a24538ae9cfa523d59f63ecd40438b42661f249
parent 7a181b7d046a710db5238fb37047816636d2bb8a
author Bipin Ravi <bipin.ravi@arm.com> 1681506092 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1681506092 +0200

Merge "fix(cpus): use hint instruction for "tsb csync"" into integration