doc: Misc syntax and spelling fixes
Tidying up a few Sphinx warnings that had built-up over time.
None of these are critical but it cleans up the Sphinx output.
At the same time, fixing some spelling errors that were detected.
Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst
index 1deacb7..4958fc0 100644
--- a/docs/design/firmware-design.rst
+++ b/docs/design/firmware-design.rst
@@ -1672,7 +1672,7 @@
point during a cold boot.
- On Juno, SCP_BL2 is loaded temporarily into the EL3 Runtime Software memory
- region and transfered to the SCP before being overwritten by EL3 Runtime
+ region and transferred to the SCP before being overwritten by EL3 Runtime
Software.
- BL32 (for AArch64) can be loaded in one of the following locations:
@@ -2623,7 +2623,7 @@
Cortex-A15 target.
Platform can also set ``ARM_WITH_NEON=yes`` to enable neon support.
-Note that using neon at runtime has constraints on non secure wolrd context.
+Note that using neon at runtime has constraints on non secure world context.
TF-A does not yet provide VFP context management.
Directive ``ARM_CORTEX_A<x>`` and ``ARM_WITH_NEON`` are used to set