feat(msm8916): power on L2 caches for secondary clusters
On platforms with multiple CPU clusters the L2 cache will be only on
for the cluster of the boot CPU. Add the necessary sequence to power it
up for secondary clusters similar to the CPU boot sequence.
No functional change for platforms with a single cluster. The new code
is discarded entirely in this case.
Change-Id: I3d3bce519a8a10ef5278d74d81acf59123e00454
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
diff --git a/plat/qti/msm8916/msm8916_pm.c b/plat/qti/msm8916/msm8916_pm.c
index 79c670f..7b44d60 100644
--- a/plat/qti/msm8916/msm8916_pm.c
+++ b/plat/qti/msm8916/msm8916_pm.c
@@ -34,6 +34,10 @@
static int msm8916_pwr_domain_on(u_register_t mpidr)
{
+ /* Power on L2 cache and secondary CPU core for the first time */
+ if (PLATFORM_CLUSTER_COUNT > 1) {
+ msm8916_l2_boot(APCS_GLB(MPIDR_APCS_CLUSTER(mpidr)));
+ }
msm8916_cpu_boot(APCS_ALIAS_ACS(MPIDR_APCS_CLUSTER(mpidr),
MPIDR_AFFLVL0_VAL(mpidr)));
return PSCI_E_SUCCESS;