| commit | b254b9815ee25c90264a2305940bc575910f55e4 | [log] [tgz] |
|---|---|---|
| author | Karl Li <karl.li@mediatek.corp-partner.google.com> | Thu Aug 24 14:14:45 2023 +0800 |
| committer | Karl Li <karl.li@mediatek.com> | Tue Oct 03 13:27:18 2023 +0800 |
| tree | a03917079a8db018beca519cec4d41b6d6245711 | |
| parent | a1377a89a7838669359be3ba351a791405050ccc [diff] |
feat(mt8188): add DSB before udelay To ensure that all explicit memory accesses are complete before udelay, insert dsb before udelay. Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a Signed-off-by: Karl Li <karl.li@mediatek.com>