docs(fvp): update FVP versions used
This update is indirect cherry-pick of
e28ea93064964fbb2d2691cff5188e6b14eb5a4b
With patch series:
https://review.trustedfirmware.org/q/project:ci/tf-a-ci-scripts+branch:lts-v2.8+status:merged+before:2024-09-10+after:2024-09-08
LTS 2.8 branch now is migrated to use 11.26 & 11.24 versions.
This update is based on:
https://ci.trustedfirmware.org/view/TF-A-LTS2.8/job/tf-a-lts2.8-main/178/
https://linaro.atlassian.net/browse/TFC-646
Change-Id: Ie478b81b0f09d8664966cc1fac71a775a1a952bf
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
(cherry picked from commit c1b97672700f0f65b95958a102cceef8f8fab912)
diff --git a/docs/plat/arm/fvp/index.rst b/docs/plat/arm/fvp/index.rst
index 42c0eda..ef56f66 100644
--- a/docs/plat/arm/fvp/index.rst
+++ b/docs/plat/arm/fvp/index.rst
@@ -12,26 +12,23 @@
(64-bit host machine only).
.. note::
- The FVP models used are Version 11.19 Build 14, unless otherwise stated.
+ The FVP models used are Version 11.26 Build 11, unless otherwise stated.
+
- ``Foundation_Platform``
-- ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` (Version 11.17/21)
-- ``FVP_Base_AEMv8A-GIC600AE`` (Version 11.17/21)
- ``FVP_Base_AEMvA``
- ``FVP_Base_AEMvA-AEMvA``
-- ``FVP_Base_Cortex-A32x4`` (Version 11.12/38)
+- ``FVP_Base_Cortex-A32x4``
- ``FVP_Base_Cortex-A35x4``
- ``FVP_Base_Cortex-A53x4``
- ``FVP_Base_Cortex-A55``
-- ``FVP_Base_Cortex-A55x4+Cortex-A75x4``
-- ``FVP_Base_Cortex-A55x4+Cortex-A76x2``
- ``FVP_Base_Cortex-A57x1-A53x1``
- ``FVP_Base_Cortex-A57x2-A53x4``
- ``FVP_Base_Cortex-A57x4``
- ``FVP_Base_Cortex-A57x4-A53x4``
- ``FVP_Base_Cortex-A65``
-- ``FVP_Base_Cortex-A65AE``
-- ``FVP_Base_Cortex-A710x4`` (Version 11.17/21)
+- ``FVP_Base_Cortex-A65AE`` (Version 11.24/24)
+- ``FVP_Base_Cortex-A710`` (Version 11.24/24)
- ``FVP_Base_Cortex-A72x4``
- ``FVP_Base_Cortex-A72x4-A53x4``
- ``FVP_Base_Cortex-A73x4``
@@ -42,18 +39,13 @@
- ``FVP_Base_Cortex-A77``
- ``FVP_Base_Cortex-A78``
- ``FVP_Base_Cortex-A78C``
-- ``FVP_Base_Cortex-X2x4`` (Version 11.17/21)
-- ``FVP_Base_Neoverse-E1``
+- ``FVP_Base_Cortex-X2``
+- ``FVP_Base_Neoverse-E1`` (Version 11.24/24)
- ``FVP_Base_Neoverse-N1``
-- ``FVP_Base_Neoverse-N2x4`` (Version 11.16/16)
+- ``FVP_Base_Neoverse-N2``
- ``FVP_Base_Neoverse-V1``
- ``FVP_Base_RevC-2xAEMvA``
-- ``FVP_Morello`` (Version 0.11/33)
-- ``FVP_RD_E1_edge`` (Version 11.17/29)
-- ``FVP_RD_V1`` (Version 11.17/29)
- ``FVP_TC0`` (Version 11.17/18)
-- ``FVP_TC1`` (Version 11.17/33)
-- ``FVP_TC2`` (Version 11.18/28)
The latest version of the AArch32 build of TF-A has been tested on the
following Arm FVPs without shifted affinities, and that do not support threaded