tree 6d3d5d39c2568592853a038d7903ee1419aba352
parent b8247e1189c0fe87e802773925fb3514afbd3bf2
parent 47d1773f90c84065c939ee190bb85f6221cd9dda
author Manish Pandey <manish.pandey2@arm.com> 1593179978 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1593179978 +0000

Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration

* changes:
  plat: marvell: armada: a8k: add OP-TEE OS MMU tables
  drivers: marvell: add support for mapping the entire LLC to SRAM
  plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms
  plat: marvell: armada: reduce memory size reserved for FIP image
  plat: marvell: armada: platform definitions cleanup
  plat: marvell: armada: a8k: check CCU window state before loading MSS BL2
  drivers: marvell: add CCU driver API for window state checking
  drivers: marvell: align and extend llc macros
  plat: marvell: a8k: move address config of cp1/2 to BL2
  plat: marvell: armada: re-enable BL32_BASE definition
  plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer
  marvell: comphy: initialize common phy selector for AP mode
  marvell: comphy: update rx_training procedure
  plat: marvell: armada: configure amb for all CPs
  plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs