Support asynchronous method for BL3-2 initialization
This patch adds support for BL3-2 initialization by asynchronous
method where BL3-1 transfers control to BL3-2 using world switch.
After BL3-2 initialization, it transfers control to BL3-3 via SPD
service handler. The SPD service handler initializes the CPU context
to BL3-3 entrypoint depending on the return function indentifier from
TSP initialization.
Fixes ARM-software/TF-issues#184
Change-Id: I7b135c2ceeb356d3bb5b6a287932e96ac67c7a34
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index ff3c53b..68bdd36 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -51,7 +51,7 @@
* Variable to indicate whether next image to execute after BL31 is BL33
* (non-secure & default) or BL32 (secure).
******************************************************************************/
-static uint32_t next_image_type;
+static uint32_t next_image_type = NON_SECURE;
/*******************************************************************************
* Simple function to initialise all BL31 helper libraries.
@@ -89,9 +89,6 @@
/* Clean caches before re-entering normal world */
dcsw_op_all(DCCSW);
- /* By default run the non-secure BL3-3 image next */
- next_image_type = NON_SECURE;
-
/*
* All the cold boot actions on the primary cpu are done. We now need to
* decide which is the next image (BL32 or BL33) and how to execute it.