tree 6a77ab51f2da53c76238602eb389770a3a0a86a7
parent dd2bdee61682df0ec65dfc43371c126a86a30c30
author Soby Mathew <soby.mathew@arm.com> 1404486146 +0100
committer Soby Mathew <soby.mathew@arm.com> 1406797798 +0100

Optimize EL3 register state stored in cpu_context structure

This patch further optimizes the EL3 register state stored in
cpu_context. The 2 registers which are removed from cpu_context are:

  * cntfrq_el0 is the system timer register which is writable
    only in EL3 and it can be programmed during cold/warm boot. Hence
    it need not be saved to cpu_context.

  * cptr_el3 controls access to Trace, Floating-point, and Advanced
    SIMD functionality and it is programmed every time during cold
    and warm boot. The current BL3-1 implementation does not need to
    modify the access controls during normal execution and hence
    they are expected to remain static.

Fixes ARM-software/tf-issues#197

Change-Id: I599ceee3b73a7dcfd37069fd41b60e3d397a7b18