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review.trustedfirmware.org / sandbox / arthur / trustedfirmware-a / 1852f608bd489158613667ec738e639bb51ffb42 / . / lib / cpus / errata_common.c
blob: fd7919db5dad1b0ef9adbb77b5ccbce329d3ae64 [file] [log] [blame]
Arvind Ram Prakashc4c6eae2024-08-05 16:11:42 -0500[diff] [blame]1/*
Govindraj Raja57bdc572025-02-04 16:04:27 +0100[diff] [blame]2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved.
Arvind Ram Prakashc4c6eae2024-08-05 16:11:42 -0500[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/* Runtime C routines for errata workarounds and common routines */
8
9#include <arch.h>
10#include <arch_helpers.h>
Sona Mathew33a04462024-07-10 18:04:40 -0500[diff] [blame]11#include <cortex_a75.h>
Govindraj Raja57bdc572025-02-04 16:04:27 +0100[diff] [blame]12#include <cortex_a520.h>
Govindraj Raja8f709372025-01-21 12:32:14 -0600[diff] [blame]13#include <cortex_a710.h>
Govindraj Raja857cfc22025-01-21 17:00:11 -0600[diff] [blame]14#include <cortex_a715.h>
Govindraj Raja36b53f92025-01-21 17:12:33 -0600[diff] [blame]15#include <cortex_a720.h>
Govindraj Raja17b8a8a2025-02-04 16:20:35 +0100[diff] [blame]16#include <cortex_a725.h>
Govindraj Raja3e9433d2025-01-21 18:02:51 -0600[diff] [blame]17#include <cortex_x2.h>
Govindraj Raja1852f602025-01-21 18:12:35 -0600[diff] [blame^]18#include <cortex_x3.h>
Arvind Ram Prakashc4c6eae2024-08-05 16:11:42 -0500[diff] [blame]19#include <cortex_x4.h>
20#include <lib/cpus/cpu_ops.h>
21#include <lib/cpus/errata.h>
22
23#if ERRATA_A520_2938996 || ERRATA_X4_2726228
24unsigned int check_if_affected_core(void)
25{
26 uint32_t midr_val = read_midr();
27 long rev_var = cpu_get_rev_var();
28
29 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) {
30 return check_erratum_cortex_a520_2938996(rev_var);
31 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) {
32 return check_erratum_cortex_x4_2726228(rev_var);
33 }
34
35 return ERRATA_NOT_APPLIES;
36}
37#endif
Sona Mathew33a04462024-07-10 18:04:40 -0500[diff] [blame]38
39#if ERRATA_A75_764081
40bool errata_a75_764081_applies(void)
41{
42 long rev_var = cpu_get_rev_var();
43
44 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) {
45 return true;
46 }
47 return false;
48}
49#endif /* ERRATA_A75_764081 */
Govindraj Raja57bdc572025-02-04 16:04:27 +0100[diff] [blame]50
51bool errata_ich_vmcr_el2_applies(void)
52{
53 switch (EXTRACT_PARTNUM(read_midr())) {
Govindraj Raja8f709372025-01-21 12:32:14 -0600[diff] [blame]54#if ERRATA_A710_3701772
55 case EXTRACT_PARTNUM(CORTEX_A710_MIDR):
56 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES)
57 return true;
58 break;
59#endif /* ERRATA_A710_3701772 */
60
Govindraj Raja857cfc22025-01-21 17:00:11 -0600[diff] [blame]61#if ERRATA_A715_3699560
62 case EXTRACT_PARTNUM(CORTEX_A715_MIDR):
63 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES)
64 return true;
65 break;
66#endif /* ERRATA_A715_3699560 */
67
Govindraj Raja36b53f92025-01-21 17:12:33 -0600[diff] [blame]68#if ERRATA_A720_3699561
69 case EXTRACT_PARTNUM(CORTEX_A720_MIDR):
70 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES)
71 return true;;
72 break;
73#endif /* ERRATA_A720_3699561 */
74
Govindraj Raja17b8a8a2025-02-04 16:20:35 +0100[diff] [blame]75#if ERRATA_A725_3699564
76 case EXTRACT_PARTNUM(CORTEX_A725_MIDR):
77 if (check_erratum_cortex_a725_3699564(cpu_get_rev_var()) == ERRATA_APPLIES)
78 return true;
79 break;
80#endif /* ERRATA_A725_3699564 */
Govindraj Raja3e9433d2025-01-21 18:02:51 -0600[diff] [blame]81
82#if ERRATA_X2_3701772
83 case EXTRACT_PARTNUM(CORTEX_X2_MIDR):
84 if (check_erratum_cortex_x2_3701772(cpu_get_rev_var()) == ERRATA_APPLIES)
85 return true;
86 break;
87#endif /* ERRATA_X2_3701772 */
88
Govindraj Raja1852f602025-01-21 18:12:35 -0600[diff] [blame^]89#if ERRATA_X3_3701769
90 case EXTRACT_PARTNUM(CORTEX_X3_MIDR):
91 if (check_erratum_cortex_x3_3701769(cpu_get_rev_var()) == ERRATA_APPLIES)
92 return true;
93 break;
94#endif /* ERRATA_X3_3701769 */
95
Govindraj Raja57bdc572025-02-04 16:04:27 +0100[diff] [blame]96 default:
97 break;
98 }
99
100 return false;
101}