| Boyan Karatotev | 35d18d8 | 2025-01-07 09:14:31 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <drivers/arm/gicv2.h> |
| 8 | #include <plat/arm/common/plat_arm.h> |
| 9 | #include <plat/common/platform.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | /****************************************************************************** |
| 13 | * The following functions are defined as weak to allow a platform to override |
| 14 | * the way the GICv2 driver is initialised and used. |
| 15 | *****************************************************************************/ |
| 16 | #pragma weak plat_arm_gic_driver_init |
| 17 | #pragma weak plat_arm_gic_init |
| 18 | #pragma weak plat_arm_gic_cpuif_enable |
| 19 | #pragma weak plat_arm_gic_cpuif_disable |
| 20 | #pragma weak plat_arm_gic_pcpu_init |
| 21 | |
| 22 | /****************************************************************************** |
| 23 | * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 |
| 24 | * interrupts. |
| 25 | *****************************************************************************/ |
| 26 | static const interrupt_prop_t arm_interrupt_props[] = { |
| 27 | PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0), |
| 28 | PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0) |
| 29 | }; |
| 30 | |
| 31 | static unsigned int target_mask_array[PLATFORM_CORE_COUNT]; |
| 32 | |
| 33 | static const gicv2_driver_data_t arm_gic_data = { |
| 34 | .gicd_base = PLAT_ARM_GICD_BASE, |
| 35 | .gicc_base = PLAT_ARM_GICC_BASE, |
| 36 | .interrupt_props = arm_interrupt_props, |
| 37 | .interrupt_props_num = ARRAY_SIZE(arm_interrupt_props), |
| 38 | .target_masks = target_mask_array, |
| 39 | .target_masks_num = ARRAY_SIZE(target_mask_array), |
| 40 | }; |
| 41 | |
| 42 | /****************************************************************************** |
| 43 | * ARM common helper to initialize the GICv2 only driver. |
| 44 | *****************************************************************************/ |
| 45 | void plat_arm_gic_driver_init(void) |
| 46 | { |
| 47 | gicv2_driver_init(&arm_gic_data); |
| 48 | } |
| 49 | |
| 50 | void plat_arm_gic_init(void) |
| 51 | { |
| 52 | gicv2_distif_init(); |
| 53 | gicv2_pcpu_distif_init(); |
| 54 | gicv2_set_pe_target_mask(plat_my_core_pos()); |
| 55 | gicv2_cpuif_enable(); |
| 56 | } |
| 57 | |
| 58 | /****************************************************************************** |
| 59 | * ARM common helper to enable the GICv2 CPU interface |
| 60 | *****************************************************************************/ |
| 61 | void plat_arm_gic_cpuif_enable(void) |
| 62 | { |
| 63 | gicv2_cpuif_enable(); |
| 64 | } |
| 65 | |
| 66 | /****************************************************************************** |
| 67 | * ARM common helper to disable the GICv2 CPU interface |
| 68 | *****************************************************************************/ |
| 69 | void plat_arm_gic_cpuif_disable(void) |
| 70 | { |
| 71 | gicv2_cpuif_disable(); |
| 72 | } |
| 73 | |
| 74 | /****************************************************************************** |
| 75 | * ARM common helper to initialize the per cpu distributor interface in GICv2 |
| 76 | *****************************************************************************/ |
| 77 | void plat_arm_gic_pcpu_init(void) |
| 78 | { |
| 79 | gicv2_pcpu_distif_init(); |
| 80 | gicv2_set_pe_target_mask(plat_my_core_pos()); |
| 81 | } |
| 82 | |
| 83 | /****************************************************************************** |
| 84 | * Stubs for Redistributor power management. Although GICv2 doesn't have |
| 85 | * Redistributor interface, these are provided for the sake of uniform GIC API |
| 86 | *****************************************************************************/ |
| 87 | void plat_arm_gic_redistif_on(void) |
| 88 | { |
| 89 | return; |
| 90 | } |
| 91 | |
| 92 | void plat_arm_gic_redistif_off(void) |
| 93 | { |
| 94 | return; |
| 95 | } |
| 96 | |
| 97 | |
| 98 | /****************************************************************************** |
| 99 | * ARM common helper to save & restore the GICv3 on resume from system suspend. |
| 100 | * The normal world currently takes care of saving and restoring the GICv2 |
| 101 | * registers due to legacy reasons. Hence we just initialize the Distributor |
| 102 | * on resume from system suspend. |
| 103 | *****************************************************************************/ |
| 104 | void plat_arm_gic_save(void) |
| 105 | { |
| 106 | return; |
| 107 | } |
| 108 | |
| 109 | void plat_arm_gic_resume(void) |
| 110 | { |
| 111 | gicv2_distif_init(); |
| 112 | gicv2_pcpu_distif_init(); |
| 113 | } |