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arthur
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42d4d3baacb3b11c68163ec85de1bf2e34e0c882
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include
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lib
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cpus
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aarch32
42d4d3b
refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3
by Arvind Ram Prakash
· 2 years, 9 months ago
da04341
build: always prefix section names with `.`
by Chris Kay
· 2 years, 6 months ago
5668db7
feat(ti): set snoop-delayed exclusive handling on A72 cores
by Andrew Davis
· 2 years, 7 months ago
81858a3
feat(ti): set L2 cache ECC and and parity on A72 cores
by Andrew Davis
· 2 years, 7 months ago
aee2f33
feat(ti): set L2 cache data ram latency on A72 cores to 4 cycles
by Andrew Davis
· 2 years, 7 months ago
d5dfdeb
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
by Julius Werner
· 6 years ago
8785a7c
cpus: Fix Cortex-A12 MIDR mask
by Heiko Stuebner
· 6 years ago
0b64c19
Cortex-A17: Implement workaround for errata 852421
by Ambroise Vincent
· 6 years ago
5f2c690
Cortex-A15: Implement workaround for errata 827671
by Ambroise Vincent
· 6 years ago
0f6fbbd
Cortex-A57: Implement workaround for erratum 814670
by Ambroise Vincent
· 6 years ago
1a74e4a
cpus: Add casts to all definitions in CPU headers
by Antonio Nino Diaz
· 6 years ago
a69817e
cpus: Fix some incorrect definitions in CPU headers
by Antonio Nino Diaz
· 6 years ago
09d40e0
Sanitise includes across codebase
by Antonio Nino Diaz
· 7 years ago
c3cf06f
Standardise header guards across codebase
by Antonio Nino Diaz
· 7 years ago
12af5ed
Make errata reporting mandatory for CPU files
by Soby Mathew
· 7 years ago
da3b038
plat/arm: relocate the jump_if_cpu_midr macro.
by Deepak Pandey
· 7 years ago
fe199e3
Remove all other deprecated interfaces and files
by Antonio Nino Diaz
· 7 years ago
9fdad69
Remove integrity check in declare_cpu_ops_base
by Roberto Vargas
· 7 years ago
f21b9f6
Remove .struct directive
by Roberto Vargas
· 7 years ago
e086570
aarch32: Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· 7 years ago
d95eb47
Merge pull request #1228 from dp-arm/dp/cve_2017_5715
by davidcunado-arm
· 8 years ago
e4b34ef
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· 8 years ago
b1d27b4
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· 8 years ago
1ca8d02
ARMv7: introduce Cortex-A12
by Etienne Carriere
· 8 years ago
778e411
ARMv7: introduce Cortex-A17
by Etienne Carriere
· 8 years ago
6ff43c2
ARMv7: introduce Cortex-A7
by Etienne Carriere
· 8 years ago
d56a846
ARMv7: introduce Cortex-A5
by Etienne Carriere
· 8 years ago
e3148c2
ARMv7: introduce Cortex-A9
by Etienne Carriere
· 8 years ago
10922e7
ARMv7: introduce Cortex-A15
by Etienne Carriere
· 8 years ago
6de9b33
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· 8 years ago
45b52c2
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· 8 years ago
80bcf98
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 8 years ago
e4e6c4b
CPU: Make shifted constants unsigned
by Eleanor Bonnici
· 8 years ago
f9688f2
aarch32: Fix L2CTRL definition for Cortex A57 and A72
by Dimitris Papastamos
· 8 years ago
3749d85
aarch32: Implement errata workarounds for Cortex A53
by Dimitris Papastamos
· 8 years ago
fb7d32e
Unique names for defines in the CPU libraries
by Varun Wadekar
· 8 years ago
82cb2c1
Use SPDX license identifiers
by dp-arm
· 8 years ago
dc78758
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· 9 years ago
10bcd76
Report errata workaround status to console
by Jeenu Viswambharan
· 9 years ago
3d8256b
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· 9 years ago
5dd9dbb
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· 9 years ago
03a3042
AArch32: Add support for ARM Cortex-A32 MPCore Processor
by Yatharth Kochar
· 9 years ago
1a0a3f0
AArch32: Common changes needed for BL1/BL2
by Yatharth Kochar
· 9 years ago
e33b78a
AArch32: Add support in TF libraries
by Soby Mathew
· 9 years ago