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review.trustedfirmware.org / sandbox / arthur / trustedfirmware-a / 53d9c9c85bc49845c4c40315e1ab29d627a1f8c3 / include / lib / aarch64 / arch.h
  1. 53d9c9c Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 8 years ago
  2. 1ae5c8b Merge pull request #879 from Summer-ARM/sq/mt-support by davidcunado-arm · 8 years ago
  3. d8d6cf2 ARM platforms: Add support for MT bit in MPIDR by Summer Qin · 8 years ago
  4. 0b64f4e Add dynamic region support to xlat tables lib v2 by Antonio Nino Diaz · 8 years ago
  5. 85e93ba Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · 8 years ago
  6. 10bcd76 Report errata workaround status to console by Jeenu Viswambharan · 9 years ago
  7. 0029624 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · 9 years ago
  8. 495f3d3 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · 9 years ago
  9. b7b0787 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · 9 years ago
  10. e871955 Automatically select initial xlation lookup level by Antonio Nino Diaz · 9 years ago
  11. c45f627 Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · 9 years ago
  12. 3ca9928 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  13. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  14. 5f65497 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  15. df37373 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 10 years ago
  16. 6cd12da Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 10 years ago
  17. ce4c820 Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  18. 4991ecd Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  19. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 11 years ago
  20. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  21. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 11 years ago
  22. 01b916b Juno: Implement initial platform port by Sandrine Bailleux · 11 years ago
  23. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 11 years ago
  24. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  25. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  26. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  27. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  28. 73ad257 Calculate TCR bits based on VA and PA by Lin Ma · 11 years ago
  29. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 11 years ago
  30. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 11 years ago
  31. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 11 years ago
  32. fa9c08b Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  33. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  34. 23ff9ba Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago
  35. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  36. 5b827a8 Separate BL functions out of arch.h by Dan Handley · 11 years ago
  37. 4ecca33 Move include and source files to logical locations by Dan Handley · 11 years ago[Renamed from include/aarch64/arch.h]
  38. b495bde Merge pull request #50 from vikramkanigiri/vk/tf-issues#26 by achingupta · 11 years ago