1. 55c70cb Correct system include order by David Cunado · 9 years ago
  2. 5dd9dbb Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 9 years ago
  3. 1319e7b Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  4. 54035fc Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 10 years ago
  5. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  6. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
  7. 683f788 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 11 years ago
  8. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  9. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 11 years ago
  10. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  11. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  12. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  13. 24fb838 Add platform API for reset handling by Soby Mathew · 11 years ago
  14. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago